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git01.mediatek.com / filogic / uboot / 83694567a61f960b7325ecee8c3a716f6cd213c6 / drivers / clk / renesas / clk-rcar-gen2.c
  1. 0f6aa07 clk: renesas: Add support for setting MMCIF clock divider on Gen2 by Marek Vasut · Mon Mar 18 06:04:02 2019 +0100
  2. 31872db clk: renesas: Fix swapped div and mul in debug output on Gen2 by Marek Vasut · Mon Mar 18 05:38:08 2019 +0100
  3. 272daa7 clk: renesas: Fix SDH clock divider decoding on Gen2 by Marek Vasut · Mon Mar 18 05:11:42 2019 +0100
  4. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  5. f63b295 clk: renesas: Add Gen2 clock core by Marek Vasut · Mon Jan 08 16:38:51 2018 +0100