Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 83141c53f03478b8a12d124c135a4ee988bb7f50 / drivers / ddr / altera / sequencer.h
  1. 6bccacf ddr: altera: Add DDR2 support to Gen5 driver by Marek Vasut · 5 years ago
  2. 2be4a3e dm: ddr: socfpga: fix gen5 ddr driver to not use bss by Simon Goldschmidt · 5 years ago
  3. 24910c3 arm: socfpga: move gen5 SDR driver to DM by Simon Goldschmidt · 6 years ago
  4. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  5. 324d3f7 ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL by Marek Vasut · 9 years ago
  6. 32d813e ddr: altera: sequencer: Zap VFIFO_SIZE by Marek Vasut · 9 years ago
  7. 2dfc76b ddr: altera: sequencer: Pluck out RW_MGR_* macros from code by Marek Vasut · 9 years ago
  8. 42ed1f2 ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS by Marek Vasut · 9 years ago
  9. eb98b38 ddr: altera: sequencer: Zap unused params and macros by Marek Vasut · 9 years ago
  10. 0f0840d ddr: altera: Clean up mem_config() by Marek Vasut · 9 years ago
  11. cd5d38e ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directly by Marek Vasut · 9 years ago
  12. 33acf0f ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS by Marek Vasut · 9 years ago
  13. a334010 ddr: altera: Pluck out remaining sdr_get_addr() calls by Marek Vasut · 9 years ago
  14. 135cc7f driver/ddr/altera: Add the sdram calibration portion by Dinh Nguyen · 9 years ago