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git01.mediatek.com / filogic / uboot / 828d41b0a8a661f1c2f768c136f69ac2dfacee89 / drivers / clk / clk_stm32mp1.c
  1. a77c6ed stm32mp1: clk: use gd to store frequency information by Patrick Delaunay · Tue Jul 30 19:16:55 2019 +0200
  2. a06a456 stm32mp1: clk: remove debug traces by Patrick Delaunay · Tue Jul 30 19:16:54 2019 +0200
  3. 03d87aa clk: stm32mp1: Add RTC clock entry by Patrick Delaunay · Thu Jul 11 12:03:37 2019 +0200
  4. 942ee23 clk: clk_stm32mp1: Fix warnings when compiling with W=1 by Patrick Delaunay · Fri Jun 21 15:26:48 2019 +0200
  5. 82b88ef stm32mp1: syscon: remove stgen by Patrick Delaunay · Fri Jul 05 17:20:11 2019 +0200
  6. 5bfc870 stm32mp1: clk: use the correct identifier for ethck by Patrick Delaunay · Fri May 17 15:08:42 2019 +0200
  7. 08ca06b clk: stm32mp1: Add SPI1 clock entry by Patrice Chotard · Tue Apr 30 18:08:27 2019 +0200
  8. 854c59e clk: stm32mp1: add set_rate for DDRPHYC clock by Patrick Delaunay · Thu Apr 18 17:32:48 2019 +0200
  9. 5d06141 stm32mp1: add trusted boot with TF-A by Patrick Delaunay · Tue Feb 12 11:44:39 2019 +0100
  10. 9a6ce2a clk: stm32mp1: correctly handle Clock Spreading Generator by Patrick Delaunay · Wed Jan 30 13:07:06 2019 +0100
  11. e8d836c clk: stm32mp1: add debug information by Patrick Delaunay · Wed Jan 30 13:07:04 2019 +0100
  12. 45e5da5 clk: stm32mp1: recalculate counter when switching freq by Patrick Delaunay · Wed Jan 30 13:07:03 2019 +0100
  13. f5aaa07 clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR by Patrick Delaunay · Wed Jan 30 13:07:02 2019 +0100
  14. 629f44f clk: stm32mp1: add IPCC clock by Patrick Delaunay · Wed Jan 30 13:07:01 2019 +0100
  15. 7b72653 clk: stm32mp1: no more get ck_usbo_48m in device tree by Patrick Delaunay · Wed Jan 30 13:07:00 2019 +0100
  16. 3247081 clk: stm32: add hardware spinlock clock by Benjamin Gaignard · Tue Nov 27 13:49:51 2018 +0100
  17. 80cb568 stm32mp1: clk: support digital bypass by Patrick Delaunay · Mon Jul 16 10:41:46 2018 +0200
  18. 201f0d5 stm32mp1: clk: add ADC clock gating by Patrick Delaunay · Mon Jul 16 10:41:45 2018 +0200
  19. effe2b4 stm32mp1: clk: update Ethernet clock gating by Patrick Delaunay · Mon Jul 16 10:41:44 2018 +0200
  20. 8314d2c stm32mp1: clk: add LDTC and DSI clock support by Patrick Delaunay · Mon Jul 16 10:41:43 2018 +0200
  21. 5327d37 stm32mp1: clk: add common function pll_get_fvco by Patrick Delaunay · Mon Jul 16 10:41:42 2018 +0200
  22. a7c0fd6 stm32mp1: clk: define RCC_PLLNCFGR2_SHIFT macro by Patrick Delaunay · Mon Jul 16 10:41:41 2018 +0200
  23. b139a5b misc: stm32: Add STM32MP1 support by Patrick Delaunay · Mon Jul 09 15:17:20 2018 +0200
  24. 4cb3b53 clk: stm32mp1: Add VREF clock gating by Fabrice Gasnier · Thu Apr 26 17:00:47 2018 +0200
  25. 8b0c8a1 SPDX: Convert all of our multiple license tags to Linux Kernel style by Tom Rini · Sun May 06 18:27:01 2018 -0400
  26. bf7d944 clock: stm32mp1: add stgen clock source change support by Patrick Delaunay · Tue Mar 20 11:41:25 2018 +0100
  27. f11398e clk: stm32mp1: add clock tree initialization by Patrick Delaunay · Mon Mar 12 10:46:16 2018 +0100
  28. e6ab627 clk: add driver for stm32mp1 by Patrick Delaunay · Mon Mar 12 10:46:15 2018 +0100