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git01.mediatek.com / filogic / uboot / 82890804c00fe609f0e4b06444335c05e26320e2 / drivers / clk / rockchip / clk_rk3568.c
  1. f179826 clk: rockchip: correct trivial typo in debug message by Eugen Hristev · Tue Apr 11 10:17:56 2023 +0300
  2. 1f7e8ff clk: rockchip: rk3568: Add dummy I2S1_MCLKOUT_TX clock support by Jonas Karlman · Mon Apr 17 19:07:25 2023 +0000
  3. 74da8be clk: rockchip: rk3568: add stubs for CLK_PCIEPHY_REF clocks by Vasily Khoruzhick · Tue Mar 07 21:16:10 2023 -0800
  4. 393cdce clk: rockchip: rk3568: Fix reset handler by Peter Geis · Tue Mar 14 00:38:26 2023 +0000
  5. d35b4c8 clk: rockchip: rk3568: add more supported clk rates for sdmmc and emmc by Vasily Khoruzhick · Thu Feb 23 13:03:32 2023 -0800
  6. 7b9b926 clk: rockchip: rk3568: update clks by Elaine Zhang · Tue Oct 12 16:43:00 2021 +0800
  7. 5be90bb rockchip: rk3568: add clock driver by Elaine Zhang · Wed Jun 02 11:39:24 2021 +0800