Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
80a12ab4d12e1fcc77130b04173c73fa67e80788
/
arch
/
x86
/
cpu
/
coreboot
4c2acfe
x86: coreboot: Remove the dummy pch driver
by Bin Meng
· Wed Jun 22 02:30:03 2016 -0700
2f8560c
x86: Call board_final_cleanup() in last_stage_init()
by Bin Meng
· Wed May 11 07:44:56 2016 -0700
164e757
x86: Move asm/arch-coreboot/tables.h to a common place
by Bin Meng
· Sat Feb 27 22:57:55 2016 -0800
3276163
dm: x86: spi: Convert ICH SPI driver to driver model PCI API
by Simon Glass
· Mon Jan 18 20:19:21 2016 -0700
38de020
x86: Convert to use driver model timer
by Bin Meng
· Fri Nov 13 00:11:22 2015 -0800
c35328a
x86: coreboot: Convert to use more dm drivers
by Bin Meng
· Fri Aug 28 02:22:38 2015 -0700
2bc8b8a
x86: coreboot: Allow >=4GiB memory bank size
by Bin Meng
· Thu Aug 13 00:29:11 2015 -0700
535109a
x86: Remove calculate_relocation_address()
by Bin Meng
· Thu Aug 13 00:29:10 2015 -0700
345ceca
x86: coreboot: Correctly report E820 types
by Bin Meng
· Thu Aug 13 00:29:09 2015 -0700
a1548b8
x86: pci: Tidy up the generic x86 PCI driver
by Simon Glass
· Fri Jul 03 18:28:25 2015 -0600
ef37e7b
x86: qemu: Implement PIRQ routing
by Bin Meng
· Wed Jun 03 09:20:06 2015 +0800
70be096
x86: coreboot: Control I/O port 0xb2 writing via device tree
by Bin Meng
· Wed Jun 03 09:20:05 2015 +0800
5949013
x86: coreboot: Fix cosmetic issues
by Bin Meng
· Wed Jun 03 09:20:02 2015 +0800
9278471
x86: link: Add PCH driver to support SPI Flash
by Simon Glass
· Mon Apr 20 07:07:03 2015 -0600
3da658a
dm: x86: pci: Convert coreboot to use driver model for pci
by Simon Glass
· Thu Mar 05 12:25:32 2015 -0700
745b1d1
x86: Support machines with >4GB of RAM
by Simon Glass
· Mon Mar 02 12:40:49 2015 -0700
6f71f60
x86: config: Enable hook for saving MRC configuration
by Simon Glass
· Mon Jan 19 22:16:15 2015 -0700
f4072ee
x86: Use ipchecksum from net/
by Simon Glass
· Mon Jan 19 22:16:09 2015 -0700
5390bba
x86: coreboot: Configure pci memory regions
by Bin Meng
· Tue Jan 06 22:14:23 2015 +0800
5d710a5
x86: coreboot: Move coreboot-specific defines from coreboot.h to Kconfig
by Bin Meng
· Tue Jan 06 22:14:18 2015 +0800
4c07a84
x86: coreboot: Set up timer base correctly
by Bin Meng
· Tue Jan 06 22:14:13 2015 +0800
7bf5b9e
x86: Add support for MTRRs
by Simon Glass
· Thu Jan 01 16:18:07 2015 -0700
e722852
Replace <compiler.h> with <linux/compiler.h>
by Masahiro Yamada
· Wed Nov 26 16:00:58 2014 +0900
d9de96d
x86: Remove board_early_init_r()
by Simon Glass
· Fri Nov 14 18:18:22 2014 -0700
b660ae7
Merge git://git.denx.de/u-boot-x86
by Tom Rini
· Mon Nov 24 12:00:00 2014 -0500
2024319
x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory
by Masahiro Yamada
· Thu Nov 13 12:28:41 2014 +0900
db20464
linux/kernel.h: sync min, max, min3, max3 macros with Linux
by Masahiro Yamada
· Fri Nov 07 03:03:31 2014 +0900
9f0afe7
x86: Make show_boot_progress() common
by Simon Glass
· Wed Nov 12 22:42:26 2014 -0700
59762bc
x86: Tidy up coreboot header usage
by Simon Glass
· Wed Nov 12 22:42:16 2014 -0700
7680550
x86: Refactor PCI to permit alternate init
by Simon Glass
· Wed Nov 12 22:42:11 2014 -0700
245561d
x86: Emit post codes in startup code for Chromebooks
by Simon Glass
· Wed Nov 12 22:42:09 2014 -0700
0b36ecd
x86: Add chromebook_link board
by Simon Glass
· Wed Nov 12 22:42:07 2014 -0700
588751a
x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory
by Masahiro Yamada
· Thu Nov 13 12:28:41 2014 +0900
543bb14
x86: Replace fill_processor_name() with cpu_get_name()
by Simon Glass
· Mon Nov 10 18:00:26 2014 -0700
8337433
x86: Fix up some missing prototypes
by Simon Glass
· Thu Nov 06 13:20:08 2014 -0700
19a8b12
x86: Use the standard arch_cpu_init() function
by Simon Glass
· Thu Nov 06 13:20:06 2014 -0700
8aa7873
x86: Use the standard dram_init() function
by Simon Glass
· Thu Nov 06 13:20:05 2014 -0700
8226dfd
kbuild: move asm-offsets.c from SoC directory to arch/$(ARCH)/lib
by Masahiro Yamada
· Tue Mar 18 16:38:13 2014 +0900
aa96dd1
x86: convert makefiles to Kbuild style
by Masahiro Yamada
· Mon Oct 21 11:53:34 2013 +0900
bd8ec7e
Coding Style cleanup: remove trailing white space
by Wolfgang Denk
· Mon Oct 07 13:07:26 2013 +0200
c57eadc
SPDX-License-Identifier: convert BSD-3-Clause files
by Wolfgang Denk
· Sun Jul 28 22:12:47 2013 +0200
9215e0b
config: don't define CONFIG_ARCH_DEVICE_TREE
by Stephen Warren
· Wed Jul 24 10:09:22 2013 -0700
d79de1d
Add GPL-2.0+ SPDX-License-Identifier to source files
by Wolfgang Denk
· Mon Jul 08 09:37:19 2013 +0200
eb2fd5c
x86: Add coreboot timestamps
by Simon Glass
· Wed Apr 17 16:13:48 2013 +0000
24f19b4
x86: Support adding coreboot timestanps to bootstage
by Simon Glass
· Wed Apr 17 16:13:47 2013 +0000
11d7a5b
x86: Add TSC timer
by Simon Glass
· Wed Apr 17 16:13:36 2013 +0000
ace6cd8
x86: Implement panic output for coreboot
by Simon Glass
· Wed Apr 17 16:13:34 2013 +0000
6dd76f6
x86: Fix DRAM bank size init with generic board
by Simon Glass
· Mon Apr 15 11:22:49 2013 +0000
3e93e33
x86: Use sections header to obtain link symbols
by Simon Glass
· Tue Mar 05 14:39:54 2013 +0000
6fa6e4a
x86: Permit bootstage and timer data to be used prior to relocation
by Simon Glass
· Thu Feb 28 19:26:12 2013 +0000
3297d4d
x86: Add function to get top of usable ram
by Simon Glass
· Thu Feb 28 19:26:10 2013 +0000
d1c0d2c
x86: drop unused code in coreboot.c
by Stefan Reinauer
· Sat Nov 03 11:41:39 2012 +0000
965b90b
x86: Remove coreboot_ from file name
by Stefan Reinauer
· Sat Nov 03 11:41:38 2012 +0000
56cee44
x86: Provide a way to throttle port80 accesses
by Vadim Bendebury
· Sat Nov 03 11:41:37 2012 +0000
33307c4
x86: Issue SMI to finalize Coreboot in final stage
by Duncan Laurie
· Sat Nov 03 11:41:35 2012 +0000
115f747
x86: Fix MTRR clear to detect which MTRR to use
by Duncan Laurie
· Mon Dec 03 13:59:00 2012 +0000
43a2fdd
x86: Emit port 80 post codes in show_boot_progress()
by Stefan Reinauer
· Mon Dec 03 13:58:12 2012 +0000
ef4356d
x86: coreboot: Set CONFIG_ARCH_DEVICE_TREE correctly
by Gabe Black
· Sat Nov 03 11:41:31 2012 +0000
7169ce3
x86: Override calculate_relocation_address to use the e820 map
by Gabe Black
· Mon Dec 03 14:26:08 2012 +0000
5dfabfa
x86: Ignore memory >4GB when parsing Coreboot tables
by Duncan Laurie
· Tue Oct 23 18:04:42 2012 +0000
101e4b7
x86: Clean up MTRR 7 right before jumping to the kernel
by Stefan Reinauer
· Sun Dec 02 04:49:53 2012 +0000
f0c7e2a
x86: Fill in the dram info using the e820 map on coreboot/x86
by Gabe Black
· Tue Oct 23 18:04:35 2012 +0000
5220654
x86: Enable coreboot timestamp facility support in u-boot.
by Vadim Bendebury
· Tue Oct 23 18:04:33 2012 +0000
bc30b21
x86: coreboot: Decode additional coreboot sysinfo tags
by Simon Glass
· Fri Oct 12 18:48:46 2012 +0000
9a03c91
x86: coreboot: Drop sysinfo.c
by Stefan Reinauer
· Fri Oct 12 18:48:45 2012 +0000
57c5574
x86: coreboot: Implement recursively scanning PCI busses
by Gabe Black
· Wed Oct 10 13:12:59 2012 +0000
67bb7b0
x86: coreboot: Tell u-boot about PCI bus 0 when initializing
by Gabe Black
· Wed Oct 10 13:12:57 2012 +0000
565456b
x86: coreboot: Move non-board specific files to coreboot arch directory
by Stefan Reinauer
· Wed Oct 10 13:12:56 2012 +0000
84231af
x86: Add infrastructure to extract an e820 table from the coreboot tables
by Gabe Black
· Mon Dec 05 12:09:25 2011 +0000
9fd7a1f
x86: Import code from coreboot's libpayload to parse the coreboot table
by Gabe Black
· Mon Dec 05 12:09:22 2011 +0000
27a4d07
x86: Initial commit for running as a coreboot payload
by Gabe Black
· Tue Nov 29 18:05:07 2011 +0000