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git01.mediatek.com / filogic / uboot / 7eecee6be99fcf833b575f1144aa79a4f7a3403c / board / aries / mcvevk / qts / pll_config.h
  1. 7789aab2 arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board by Wolfgang Grandegger · Sun May 12 19:25:18 2019 +0200
  2. d165c70 board/aries: Remove by Tom Rini · Mon Jul 02 15:52:50 2018 -0400
  3. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  4. 9d6c56b ARM: socfpga: Rename MCVEVK by Marek Vasut · Wed Apr 05 13:17:03 2017 +0200[Renamed from board/denx/mcvevk/qts/pll_config.h]
  5. a4efe76 arm: socfpga: mcvevk: Update DRAM clock to 400MHz by Marek Vasut · Tue Sep 08 19:51:05 2015 +0200
  6. 8e8b62a arm: socfpga: Add support for DENX MCV SoM and MCVEVK board by Marek Vasut · Mon Aug 03 01:37:28 2015 +0200