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git01.mediatek.com / filogic / uboot / 7d7da1fbb6f2c13694601686f1cc839b5d6cdd39 / arch / arm / dts / zynqmp-clk-ccf.dtsi
  1. 3767425 arm64: zynqmp: Sync DP subsystem by Michal Simek · 4 years, 9 months ago
  2. 042ae5e arm64: zynqmp: Sync zynqmp fpga manager with mainline by Nava kishore Manne · 5 years ago
  3. 4f1b7f6 arm64: zynqmp: Update Copyright years to 2020 by Michal Simek · 4 years, 9 months ago
  4. 1092d68 arm64: zynqmp: Sync gem clock nodes with mainline Linux by Michal Simek · 4 years, 11 months ago
  5. 7b6280e arm64: zynqmp: List lpd watchdog in dtsi by Michal Simek · 6 years ago
  6. ebddf49 arm64: zynqmp: Switch to xlnx-zynqmp-clk header by Michal Simek · 5 years ago
  7. 36d68be arm64: zynqmp: Add TTC clocks by Rajan Vaja · 7 years ago
  8. 090a2d7 arm64: zynqmp: Sync up license with mainline kernel by Michal Simek · 7 years ago
  9. a6604b6 arm64: zynqmp: Convert board to use zynqmp-clk driver by Michal Simek · 7 years ago