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git01.mediatek.com / filogic / uboot / 7adac4aa8b3e999a14752c9e6c68c07878047af6 / arch / arm / cpu / armv7 / exynos / soc.c
  1. 7362280 Exynos: Fix L2 cache timings on Exynos5420 and Exynos5800 by Doug Anderson · Fri Feb 20 13:27:20 2015 +0530
  2. 5877191 Exynos542x: add L2 control register configuration by Akshay Saraswat · Fri Feb 20 13:27:17 2015 +0530
  3. 85dcaed Exynos542x: cache: Disable clean/evict push to external by Akshay Saraswat · Fri Feb 20 13:27:16 2015 +0530
  4. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  5. 10cb7fa EXYNOS5: Add L2 Cache Support. by Rajeshwari Shinde · Thu Nov 29 20:29:35 2012 +0000
  6. e667e76 arm:exynos: Enable data cache at exynos based processors. by Łukasz Majewski · Tue Aug 07 03:24:03 2012 +0000
  7. 4131a77 S5PC2XX: Rename S5pc2XX to exynos by Chander Kashyap · Tue Dec 06 23:34:12 2011 +0000[Renamed from arch/arm/cpu/armv7/s5pc2xx/soc.c]
  8. b1b2468 armv7: add support for S5PC210 SoC by Minkyu Kang · Mon Jan 24 15:22:23 2011 +0900