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git01.mediatek.com / filogic / uboot / 7a033e8956a2a8caca07ba6b3249aa23ba38c7d4 / arch / arm / mach-uniphier / clk / pll-base-ld20.c
  1. c84024c ARM: uniphier: de-couple SC macros into base address and offset by Masahiro Yamada · Wed Jul 10 20:07:41 2019 +0900
  2. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  3. ff4a554 ARM: uniphier: use FIELD_PREP for PLL settings by Masahiro Yamada · Wed Dec 06 14:16:34 2017 +0900
  4. 1fe3dac ARM: uniphier: compute SSCPLL values more precisely by Masahiro Yamada · Wed Dec 06 14:16:33 2017 +0900
  5. 652c4c9 ARM: uniphier: fix SSCPLL init code for LD11 SoC by Dai Okamura · Wed Dec 06 14:16:32 2017 +0900
  6. 1f43c7b ARM: uniphier: fix DSPLL init code for LD20 SoC by Dai Okamura · Mon Aug 28 21:57:15 2017 +0900
  7. f366d38 ARM: uniphier: set up charge pump current for MPLL of LD11 SoC by Masahiro Yamada · Tue Feb 21 23:00:35 2017 +0900
  8. eb6aeca ARM: uniphier: replace <common.h> with <linux/delay.h> where possible by Masahiro Yamada · Sat Jan 21 18:05:25 2017 +0900
  9. 830abf2 ARM: uniphier: remove unneeded mdelay() in PLL setting function by Masahiro Yamada · Wed Oct 19 16:26:49 2016 +0900
  10. d11b0b7 ARM: uniphier: add PLL init code for LD20 SoC by Masahiro Yamada · Sat Sep 17 03:33:11 2016 +0900