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git01.mediatek.com / filogic / uboot / 7977ec26e83adf085e7596f2a4c13a2c15681dbb / arch / arm / include / asm / arch-sunxi / clock_sun4i.h
  1. 06bfab0 sunxi: mmc: Properly setup mod-clk and clock sampling phases by Hans de Goede · Sun Dec 07 20:55:10 2014 +0100
  2. 70d7ab5 sunxi: Add video pll clock functions by Hans de Goede · Sat Nov 08 14:07:27 2014 +0100
  3. ad0dfc5 sun4i: Rename dram_clk_cfg to dram_clk_gate by Hans de Goede · Sun Nov 09 12:24:55 2014 +0100
  4. b5ab8ce sun6i: ehci: Add sun6i ehci support by Hans de Goede · Fri Nov 07 14:51:12 2014 +0100
  5. 9f07273 sunxi: Add clock_get_pll5p() function by Hans de Goede · Wed Oct 22 14:42:48 2014 +0200
  6. 0878636 sunxi: add defines to control USB Host clocks/resets by Roman Byshko · Thu Jul 24 22:54:20 2014 +0200
  7. a2ebf92 ahci: provide sunxi SATA driver using AHCI platform framework by Ian Campbell · Fri Jul 18 20:38:41 2014 +0100
  8. 49aeca3 sunxi: add sun7i clocks and timer support. by Ian Campbell · Mon May 05 11:52:23 2014 +0100