Log - 79591ca1ecbd32e59e76ced0661ec16d75a0ecb5 - filogic/uboot

b6409f2 ARM: tegra210: set PLLE_PTS bit when enabling PLLE by Stephen Warren · Tue Mar 22 09:45:36 2016 -0600
7f75d54 ARM: tegra: note that p2371-2180 is Jetson TX1 by Stephen Warren · Thu Nov 12 08:58:22 2015 -0700
6f6ed1b ARM: tegra: error check Tegra210 XUSB padctl waits by Stephen Warren · Fri Oct 23 10:50:53 2015 -0600
e3ba569 ARM: tegra: add lane tables to Tegra210 XUSB padctl by Stephen Warren · Fri Oct 23 10:50:52 2015 -0600
7de245d ARM: tegra: switch Tegra210 to common XUSB padctl by Stephen Warren · Fri Oct 23 10:50:51 2015 -0600
553b61e ARM: tegra210: implement PLLE init procedure from TRM by Stephen Warren · Mon Oct 05 16:58:52 2015 -0600
4c3aaa7 ARM: tegra: clk_m is the architected timer source clock by Thierry Reding · Thu Aug 20 11:42:20 2015 +0200
fa6e24d ARM: tegra: Implement clk_m by Thierry Reding · Thu Aug 20 11:42:19 2015 +0200
8681561 ARM: tegra: Add p2371-2180 board by Stephen Warren · Thu Aug 13 22:34:22 2015 -0600
b6ba3fb tegra: Correct logic for reading pll_misc in clock_start_pll() by Simon Glass · Mon Aug 10 07:14:36 2015 -0600
952a573 ARM: tegra: Add p2371-0000 board by Stephen Warren · Wed Aug 05 11:52:08 2015 -0600
1b54a5e ARM: tegra: Add e2220-1170 board by Stephen Warren · Wed Aug 05 11:52:07 2015 -0600
a8480ef Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. by Tom Warren · Thu Jun 25 09:50:44 2015 -0700
27bce71 Tegra: clocks: Add 38.4MHz OSC support for T210 use by Tom Warren · Mon Jun 22 13:03:44 2015 -0700
22425c9 T210: Add support for 64-bit T210-based P2571 board by Tom Warren · Thu Feb 12 15:01:49 2015 -0700
f80dd82 ARM: Tegra210: Add SoC code/include files for T210 by Tom Warren · Mon Feb 02 13:22:29 2015 -0700
f55fdec ARM: tegra: pinctrl: move Tegra210 code to the correct dir by Stephen Warren · Wed Mar 25 12:04:34 2015 -0600