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git01.mediatek.com / filogic / uboot / 783151e7f9f5fd7748a1c6fc9715843983f1f193 / drivers / clk / altera
  1. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  2. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  3. ef5458f clk: agilex: Add clock driver for Agilex by Ley Foon Tan · Wed Nov 27 15:55:22 2019 +0800
  4. acdb7af clk: socfpga: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc by Patrick Delaunay · Wed Mar 20 18:21:25 2019 +0100
  5. c826a09 clk: Remove DM_FLAG_PRE_RELOC flag in various drivers by Bin Meng · Wed Oct 24 06:36:29 2018 -0700
  6. d6e53c7 drivers: cosmetic: Convert SPDX license tags to Linux Kernel style by Patrick Delaunay · Fri Oct 26 09:02:52 2018 +0200
  7. 3f9d735 clk: socfpga: Add initial Arria10 clock driver by Marek Vasut · Tue Jul 31 17:58:07 2018 +0200