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git01.mediatek.com / filogic / uboot / 7613579ef391b722b54a9a54c404b5de8818f664 / drivers / ddr / fsl / mpc85xx_ddr_gen3.c
  1. fe84507 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS by York Sun · Wed Dec 28 08:43:45 2016 -0800
  2. 15875a5 fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum by Shengzhou Liu · Mon Nov 21 11:36:48 2016 +0800
  3. e237880 Add more SPDX-License-Identifier tags by Tom Rini · Thu Jan 14 22:05:13 2016 -0500
  4. 2c0b62d driver/ddr/fsl: Add support for multiple DDR clocks by York Sun · Tue Jan 06 13:18:50 2015 -0800
  5. 064f126 fsl/sleep: updated the deep sleep framework for QorIQ platforms by Tang Yuantian · Fri Nov 21 11:17:15 2014 +0800
  6. a7364af mpc85xx/t104x: Add deep sleep framework support by Tang Yuantian · Thu Apr 17 15:33:46 2014 +0800
  7. 0c88c81 powerpc/mpc85xx: Revise workaround for DDR-A003 by York Sun · Wed Jan 08 13:00:42 2014 -0800
  8. a21803d Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx by York Sun · Mon Nov 18 10:29:32 2013 -0800
  9. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · Mon Sep 30 09:22:09 2013 -0700[Renamed (96%) from arch/powerpc/cpu/mpc85xx/ddr-gen3.c]
  10. 5e15555 powerpc/mpc8xxx: Add memory reset control by York Sun · Tue Jun 25 11:37:48 2013 -0700
  11. 972cc40 mpc85xx: Base emulator support by York Sun · Tue Jun 25 11:37:41 2013 -0700
  12. a2e8e0a powerpc/mpc85xx: Update workaround for DDR erratum A-004934 by York Sun · Mon Mar 25 07:39:34 2013 +0000
  13. 992562c 8xxx: Change all 8*xx_DDR addresses to 8xxx by Andy Fleming · Tue Oct 23 19:03:46 2012 -0500
  14. 1bc8b04 85xx: Protect timeout_save variable with ifdefs by Andy Fleming · Mon Oct 22 17:28:18 2012 -0500
  15. 6995a02 powerpc/mpc85xx: Add workaround for DDR erratum A004934 by York Sun · Mon Oct 08 07:44:26 2012 +0000
  16. 016095d powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT by York Sun · Mon Oct 08 07:44:24 2012 +0000
  17. 7d69ea3 powerpc/mpc8xxx: Update DDR registers by York Sun · Mon Oct 08 07:44:22 2012 +0000
  18. e8dc17b powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · Fri Aug 17 08:22:39 2012 +0000
  19. b513d9d powerpc/mpc85xx: Skip zero values for DDR debug registers by York Sun · Fri Aug 17 08:22:36 2012 +0000
  20. 4b736b8 powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 for DDR over 4GB by York Sun · Mon May 21 08:43:11 2012 +0000
  21. df2be19 powerpc/85xx: Add workaround for erratum A-003474 by York Sun · Sun Nov 20 10:01:35 2011 -0800
  22. 7d9781b powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 by York Sun · Thu Mar 17 11:18:13 2011 -0700
  23. c8fc959 powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134 by York Sun · Tue Jan 25 22:05:49 2011 -0800
  24. 9aa857b powerpc/85xx: Rename MPC8572 DDR erratum to DDR115 by York Sun · Tue Jan 25 21:51:27 2011 -0800
  25. c034d42 powerpc/85xx: Remove unnecessary polling loop from DDR init by York Sun · Tue Jan 25 21:51:26 2011 -0800
  26. 922f40f mpc85xx: Implement workaround for erratum DDR-A003 by York Sun · Mon Jan 10 12:03:01 2011 +0000
  27. ba0c2eb mpc85xx: Enable unique mode registers and dynamic ODT for DDR3 by York Sun · Mon Jan 10 12:03:00 2011 +0000
  28. 7dda847 mpc85xx: Adding more registers and options by York Sun · Mon Jan 10 12:02:59 2011 +0000
  29. 4260372 powerpc/8xxx: Enabled address hashing for 85xx by york · Fri Jul 02 22:25:54 2010 +0000
  30. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/cpu/mpc85xx/ddr-gen3.c]
  31. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · Mon Apr 12 22:28:09 2010 -0500[Renamed from cpu/mpc85xx/ddr-gen3.c]
  32. 24aa71a ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist by Kumar Gala · Tue Sep 01 22:01:54 2009 -0500
  33. 4be87b2 fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · Sat Mar 14 12:48:30 2009 +0800
  34. e674b83 Fix mpc85xx ddr-gen3 ddr_sdram_cfg. by Ed Swarthout · Tue Feb 24 02:37:59 2009 -0600
  35. 30cb145 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · Sun Jan 04 08:46:38 2009 +0530
  36. 7dc79f7 85xx: Fix the incorrect register used for DDR erratum1 by Dave Liu · Thu Oct 23 21:18:53 2008 +0800
  37. 0383694 rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · Thu Oct 16 15:01:15 2008 +0200
  38. d5a1fb9 FSL DDR: Add 85xx specific register setting by Kumar Gala · Tue Aug 26 21:34:55 2008 -0500