Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 75d797ee3ae61a7974e2d7ee960e2f417d34e1c8 / drivers / clk / sunxi / clk_a10s.c
  1. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  2. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  3. f4b29f4 clk: sunxi: Implement A10 EMAC clocks by Jagan Teki · Thu Feb 28 00:26:49 2019 +0530
  4. bc12313 clk: sunxi: Implement SPI clocks, resets by Jagan Teki · Wed Feb 27 20:02:06 2019 +0530
  5. ddf33c1 sunxi: clk: add MMC gates/resets by Andre Przywara · Tue Jan 29 15:54:09 2019 +0000
  6. 8cf08ea clk: sunxi: Implement UART clocks by Jagan Teki · Sun Dec 30 21:29:24 2018 +0530
  7. 0c16029 clk: sunxi: Add Allwinner A10s/A13 CLK driver by Jagan Teki · Thu Aug 02 19:54:26 2018 +0530