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filogic
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uboot
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74cd30ad163ab097fbdcd1419eb8d29370a17be9
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arch
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mips
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lib
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cache.c
6086d7f
MIPS: allow override of flush_dcache_range()
by Alex Nemirovsky
· Mon Dec 23 20:19:20 2019 +0000
1d91ba7
common: Move some cache and MMU functions out of common.h
by Simon Glass
· Thu Nov 14 12:57:37 2019 -0700
7e07e49
MIPS: add compile time definition of L2 cache size
by Ramon Fried
· Mon Jun 10 21:05:26 2019 +0300
7026e84
MIPS: cache: reimplement dcache_[status, enable, disable]
by Daniel Schwierzeck
· Fri Sep 07 19:02:03 2018 +0200
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
ed258e6
MIPS: Break out of cache loops for unimplemented caches
by Paul Burton
· Tue Nov 21 11:18:39 2017 -0800
834f74e
MIPS: Clear instruction hazards in flush_cache()
by Paul Burton
· Tue Nov 21 11:18:38 2017 -0800
ee3c0b8
MIPS: Ensure cache ops complete in cache maintenance functions
by Paul Burton
· Tue Nov 21 11:18:37 2017 -0800
3d6864a
MIPS: Make CM GCR base configurable
by Paul Burton
· Fri May 12 13:26:11 2017 +0200
8156078
MIPS: L2 cache support
by Paul Burton
· Wed Sep 21 11:18:54 2016 +0100
dc2037e
MIPS: Probe cache line sizes once during boot
by Paul Burton
· Wed Sep 21 11:18:48 2016 +0100
1194f94
MIPS: Fix invalidate_dcache_range to operate on L1 Dcache
by Paul Burton
· Thu Jun 09 13:09:51 2016 +0100
a97d593
MIPS: Abstract cache op loops with a macro
by Paul Burton
· Fri May 27 14:28:06 2016 +0100
62f1352
MIPS: Split I & D cache line size config
by Paul Burton
· Fri May 27 14:28:05 2016 +0100
5e51142
MIPS: Move cache sizes to Kconfig
by Paul Burton
· Fri May 27 14:28:04 2016 +0100
0e50ffc
mips: cache: Bulletproof the code against cornercases
by Marek Vasut
· Wed Jan 27 03:13:59 2016 +0100
a6dae71
MIPS: sync processor and register definitions with linux-4.4
by Daniel Schwierzeck
· Tue Jan 12 21:48:26 2016 +0100
4ff6b10
MIPS: unify cache maintenance functions
by Paul Burton
· Thu Jan 29 01:27:57 2015 +0000