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git01.mediatek.com / filogic / uboot / 745af44d646241721bfdd6bfe732b873e90958d6 / board / stx / stxssa / ddr.c
  1. dd67ddc stx: create common vendor/board hierarchy for STx boards by Alex Dubov · Fri Aug 07 15:28:32 2009 +1000[Renamed from board/stxssa/ddr.c]
  2. a06d74c fsl-ddr: use the 1T timing as default configuration by Dave Liu · Fri Nov 21 16:31:43 2008 +0800
  3. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · Fri Oct 03 12:36:55 2008 -0400
  4. 0abad32 FSL DDR: Convert STXSSA to new DDR code. by Kumar Gala · Wed Aug 27 01:04:07 2008 -0500