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git01.mediatek.com / filogic / uboot / 7450f571a9a4f40c88185d4144f04df02886b265 / drivers / clk / altera
  1. 5e317de drivers: clk: Add memory clock driver for Intel N5X device by Siew Chin Lim · Tue Aug 10 11:26:32 2021 +0800
  2. 1557df8 drivers: clk: Add clock driver for Intel N5X device by Siew Chin Lim · Tue Aug 10 11:26:30 2021 +0800
  3. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  4. b75b15b dm: treewide: Rename ..._platdata variables to just ..._plat by Simon Glass · Thu Dec 03 16:55:23 2020 -0700
  5. aad29ae dm: treewide: Rename ofdata_to_platdata() to of_to_plat() by Simon Glass · Thu Dec 03 16:55:21 2020 -0700
  6. fa20e93 dm: treewide: Rename dev_get_platdata() to dev_get_plat() by Simon Glass · Thu Dec 03 16:55:20 2020 -0700
  7. 71fa5b4 dm: treewide: Rename 'platdata' variables to just 'plat' by Simon Glass · Thu Dec 03 16:55:18 2020 -0700
  8. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  9. 9579301 clk: agilex: Additional membus writes for HPS PLL by Chee Hong Ang · Fri Jul 10 20:55:23 2020 +0800
  10. 2d94ee6 clk: agilex: Handle clock configuration differently in SPL and U-Boot proper by Chee Hong Ang · Fri Jul 10 20:55:22 2020 +0800
  11. 7609220 clk: agilex: Add clock enable support by Ley Foon Tan · Fri Jul 10 20:55:21 2020 +0800
  12. f94b0fd clk: agilex: Add NAND clock support by Ley Foon Tan · Fri Jul 10 20:55:20 2020 +0800
  13. a89b4de treewide: convert devfdt_get_addr() to dev_read_addr() by Masahiro Yamada · Fri Jul 17 14:36:48 2020 +0900
  14. 5a9ecb2 Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" by Tom Rini · Fri Jul 24 08:42:06 2020 -0400
  15. a831cef treewide: convert devfdt_get_addr() to dev_read_addr() by Masahiro Yamada · Fri Jul 17 14:36:48 2020 +0900
  16. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  17. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  18. 9d0731d dm: core: remove the duplicated function dm_ofnode_pre_reloc by Patrick Delaunay · Fri Apr 03 11:39:18 2020 +0200
  19. f54b71e clk: socfpga: Read the clock parent's register base in probe function by Chee Hong Ang · Mon Mar 09 01:21:59 2020 -0700
  20. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  21. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  22. ef5458f clk: agilex: Add clock driver for Agilex by Ley Foon Tan · Wed Nov 27 15:55:22 2019 +0800
  23. acdb7af clk: socfpga: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc by Patrick Delaunay · Wed Mar 20 18:21:25 2019 +0100
  24. c826a09 clk: Remove DM_FLAG_PRE_RELOC flag in various drivers by Bin Meng · Wed Oct 24 06:36:29 2018 -0700
  25. d6e53c7 drivers: cosmetic: Convert SPDX license tags to Linux Kernel style by Patrick Delaunay · Fri Oct 26 09:02:52 2018 +0200
  26. 3f9d735 clk: socfpga: Add initial Arria10 clock driver by Marek Vasut · Tue Jul 31 17:58:07 2018 +0200