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git01.mediatek.com / filogic / uboot / 6eefd8502fb91025bba0cf1d1f211a38c93a41bb / board / AndesTech / ae350 / ae350.c
  1. b193397 spl: riscv: falcon: move fdt blob to specified address by Randolph · Fri Dec 29 16:32:22 2023 +0800
  2. cec100f andes: ae350: Save cpu name to env by Leo Yu-Chi Liang · Tue Dec 26 14:54:27 2023 +0800
  3. 1eb9f91 andes: ae350: Implement cache switch via Kconfig by Leo Yu-Chi Liang · Tue Dec 26 14:17:33 2023 +0800
  4. b6b9900 riscv: Remove common.h usage by Tom Rini · Thu Oct 12 19:03:59 2023 -0400
  5. b4dc63f riscv: spl: andes: Move the DTB in front of kernel by Randolph · Thu Oct 12 14:35:09 2023 +0800
  6. 249ce73 riscv: Rename Andes cpu and board names by Leo Yu-Chi Liang · Tue Feb 14 20:42:49 2023 +0800[Renamed from board/AndesTech/ax25-ae350/ax25-ae350.c]
  7. 39689a9 board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init() by Yu Chien Peter Lin · Mon Feb 06 16:10:45 2023 +0800
  8. f9269c7 Prepare v2023.04-rc2 by Tom Rini · Mon Feb 13 18:39:15 2023 -0500