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git01.mediatek.com / filogic / uboot / 6df923925c523ebc00afc5c9d0e688c1681a4210 / board / opalkelly / zynq
  1. 49c24a8 board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD by Simon Glass · Sun Sep 29 19:49:47 2024 -0600
  2. b3bd3a1 board: opalkelly: Remove duplicate newlines by Marek Vasut · Fri Jul 19 12:49:01 2024 +0200
  3. 3fd6633 WS cleanup: remove trailing empty lines by Wolfgang Denk · Mon Sep 27 17:42:36 2021 +0200
  4. 79c1f6d arm: zynq: Remove low level UART setting by Michal Simek · Fri Dec 06 09:33:25 2019 +0100
  5. 014d304 xilinx: Move zynq_board_read_rom_ethaddr to shared location by Michal Simek · Mon Jan 21 15:25:02 2019 +0100
  6. 70df9d6 SPDX: Convert a few files that were missed before by Tom Rini · Mon May 07 17:02:21 2018 -0400
  7. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  8. 322b57b arm: zynq: Convert all board to use arch ps7_init code by Michal Simek · Fri Nov 10 11:00:42 2017 +0100
  9. c59949e arm: zynq: Get rid of ps7_reset_apu() for syzygy board by Michal Simek · Fri Nov 10 09:51:17 2017 +0100
  10. 3924efd arm: zynq: Remove ps7_debug code by Michal Simek · Fri Nov 10 09:09:48 2017 +0100
  11. 91d024c arm: zynq: Add support for SYZYGY Hub board by Tom McLeod · Wed Sep 27 17:53:26 2017 -0700