1. f547fca armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled by Alison Wang · 8 years ago
  2. 73818d5 armv8: Support loading 32-bit OS in AArch32 execution state by Alison Wang · 8 years ago
  3. 266c8c1 arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode by Keerthy · 8 years ago
  4. ddb0f63 armv8: add hooks for all cache-wide operations by Stephen Warren · 8 years ago
  5. 467c83e arm: Add PSCI shutdown function by Alexander Graf · 8 years ago
  6. a5b1832 arm: Disable HVC PSCI calls by default by Alexander Graf · 8 years ago
  7. 61488c1 ARM: Introduce function to switch to hypervisor mode by Keerthy · 8 years ago
  8. 3b787ef ARM: Rework and correct barrier definitions by Tom Rini · 8 years ago
  9. b8845e1 arm: implement generic PSCI reset call for armv8 by Beniamino Galvani · 9 years ago
  10. ae6c2bc arm: Add support for HYP mode and LPAE page tables by Alexander Graf · 9 years ago
  11. 188c8ff arm64: Add 32bit arm compatible dcache definitions by Alexander Graf · 9 years ago
  12. ce0a64e arm64: Remove non-full-va map code by Alexander Graf · 9 years ago
  13. e317fe8 arm64: Make full va map code more dynamic by Alexander Graf · 9 years ago
  14. d6e436e arm: Remove S bit from MMU section entry by Marek Vasut · 9 years ago
  15. fbf49c0 arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7 by Marek Vasut · 9 years ago
  16. 064949c armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure by Sergey Temerkhanov · 9 years ago
  17. 78eaa49 armv8: New MMU setup code allowing to use 48+ bits PA/VA by Sergey Temerkhanov · 9 years ago
  18. 6774e4e armv8: Add read_mpidr() function by Sergey Temerkhanov · 9 years ago
  19. fbdcd22 armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY by Stephen Warren · 9 years ago
  20. d89b72c arm: mmu: Add missing volatile for reading SCTLR register by Alison Wang · 9 years ago
  21. ba2432a armv8: caches: Added routine to set non cacheable region by Siva Durga Prasad Paladugu · 9 years ago
  22. 32db57d arm: Add a prototype for save_boot_params_ret() by Simon Glass · 10 years ago
  23. d07e7b0 tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 by Ian Campbell · 10 years ago
  24. 29d23ec ARMv7 TLB: Fixed TTBR0 and Table Descriptors to allow caching by Bryan Brinsko · 10 years ago
  25. 1ce575f armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack by York Sun · 10 years ago
  26. 47197fe arm: Allow lr to be saved by board code by Simon Glass · 10 years ago
  27. c97d974 ARM: Implement non-cached memory support by Thierry Reding · 10 years ago
  28. fe200715 ARM: cache-cp15: Use more accurate types by Thierry Reding · 10 years ago
  29. 79b9072 arm: cache: Add support for write-allocate D-Cache by Marek Vasut · 10 years ago
  30. a84cd72 ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC by York Sun · 10 years ago
  31. ef04201 armv8/cache: Change cache invalidate and flush function by York Sun · 11 years ago
  32. 85fd5f1 arm64: core support by David Feng · 11 years ago
  33. 06396c1 ARM: mmu: Set domain permissions to client access by R Sricharan · 12 years ago
  34. aa47030 ARM: add wfi assembly macro by Rob Herring · 12 years ago
  35. a4f2079 arm: Add control over cachability of memory regions by Simon Glass · 12 years ago
  36. 3cba3c1 Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · 15 years ago[Renamed from include/asm-arm/system.h]
  37. 9053b5a arm: update co-processor 15 access by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago