Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 6698b4dad2385bd3e01ea4ec1de5a7d68cb5ac30 / drivers / clk / mediatek
  1. 6698b4d clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list by Christian Marangi · Sat Aug 03 10:40:45 2024 +0200
  2. efc33e4 clk: mediatek: mt7986: comment out CK_TOP_A_TUNER as not used by Christian Marangi · Sat Aug 03 10:40:44 2024 +0200
  3. 0fc50e7 clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen by Christian Marangi · Sat Aug 03 10:40:43 2024 +0200
  4. 83b17ec clk: mediatek: mt7986: reorder TOPCKGEN factor ID by Christian Marangi · Sat Aug 03 10:40:42 2024 +0200
  5. 9276f07 clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming by Christian Marangi · Sat Aug 03 10:40:41 2024 +0200
  6. 30c4b86 clk: mediatek: mt7986: fix typo for infra_i2c0_ck by Christian Marangi · Sat Aug 03 10:40:40 2024 +0200
  7. 6a89a38 clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gate by Christian Marangi · Sat Aug 03 10:40:39 2024 +0200
  8. ab4de13 clk: mediatek: mt7986: drop 1/1 infracfg spurious factor by Christian Marangi · Sat Aug 03 10:40:38 2024 +0200
  9. 76052a2 clk: mediatek: mt7986: fix wrong parent for INFRA_ADC_26M_CK by Christian Marangi · Sat Aug 03 10:40:37 2024 +0200
  10. 7739a5f clk: mediatek: mt7986: rename 66M_MCK to SYSAXI_D2 by Christian Marangi · Sat Aug 03 10:40:36 2024 +0200
  11. 0178c61 clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL by Christian Marangi · Sat Aug 03 10:40:35 2024 +0200
  12. d349194 clk: mediatek: mt7986: fix wrong shift for PCIe clocks by Christian Marangi · Sat Aug 03 10:40:34 2024 +0200
  13. a4a0c6e Merge patch series "clk: mediatek: add OPs to support OF_UPSTREAM" by Tom Rini · Thu Aug 01 15:32:54 2024 -0600
  14. 3c2ae7d clk: mediatek: add support for APMIXED parent in infra MUX by Christian Marangi · Fri Jun 28 19:40:57 2024 +0200
  15. 475d00f clk: mediatek: add support for GATEs for APMIXED OPs by Christian Marangi · Fri Jun 28 19:40:56 2024 +0200
  16. c05ebe6 clk: mediatek: implement MUX_FLAGS and MUX_MIXED_FLAGS macro by Christian Marangi · Fri Jun 28 19:40:55 2024 +0200
  17. 29771ad clk: mediatek: add support for remapping clock ID by Christian Marangi · Fri Jun 28 19:40:54 2024 +0200
  18. e03d080 clk: mediatek: provide common clk init function for infrasys by Christian Marangi · Fri Jun 28 19:40:53 2024 +0200
  19. 56dc7cd clk: mediatek: add support for gate clock to reference topckgen clock by Christian Marangi · Fri Jun 28 19:40:52 2024 +0200
  20. 1bde149 clk: mediatek: add support for parent mux from different source for topckgen by Christian Marangi · Fri Jun 28 19:40:51 2024 +0200
  21. a4143eb clk: mediatek: add support for parent mux from different source by Christian Marangi · Fri Jun 28 19:40:50 2024 +0200
  22. 8f5b30c clk: mediatek: add support for gate ID at offset by Christian Marangi · Fri Jun 28 19:40:49 2024 +0200
  23. baa244c clk: mediatek: add support for gates in clk_tree for infrasys by Christian Marangi · Fri Jun 28 19:40:48 2024 +0200
  24. 358415a clk: mediatek: return XTAL rate for infrasys get_mux_rate by Christian Marangi · Fri Jun 28 19:40:47 2024 +0200
  25. 16f5f3f clk: mediatek: return XTAL rate directly for gates with XTAL parent by Christian Marangi · Fri Jun 28 19:40:46 2024 +0200
  26. 4dd4a28 clk: mediatek: mt7986: support alternative compatible for fixed-plls by Christian Marangi · Mon Jun 24 23:03:40 2024 +0200
  27. b25423f clk: mediatek: mt7988: support alternative compatible for fixed-plls by Christian Marangi · Mon Jun 24 23:03:39 2024 +0200
  28. 8cba8f0 clk: mediatek: mt7981: support alternative compatible for fixed-plls by Christian Marangi · Mon Jun 24 23:03:35 2024 +0200
  29. dec7ea0 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" by Tom Rini · Mon May 20 13:35:03 2024 -0600
  30. abb9a04 Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" by Tom Rini · Sat May 18 20:20:43 2024 -0600
  31. 32fa621 clk: Remove <common.h> and add needed includes by Tom Rini · Wed May 01 19:30:36 2024 -0600
  32. e9e0fee clk: mediatek: add clock driver support for MediaTek MT8365 SoC by Julien Masson · Mon Dec 04 11:48:52 2023 +0100
  33. d27e302 clk: mediatek: add clock driver support for MediaTek MT7988 SoC by developer · Wed Jul 19 17:16:28 2023 +0800
  34. 79128da clk: mediatek: add clock driver support for MediaTek MT7981 SoC by developer · Fri Sep 09 20:00:12 2022 +0800
  35. 37161fe clk: mediatek: add clock driver support for MediaTek MT7986 SoC by developer · Fri Sep 09 20:00:09 2022 +0800
  36. f724f11 clk: mediatek: add CLK_XTAL support for clock driver by developer · Fri Sep 09 20:00:07 2022 +0800
  37. ad5b075 clk: mediatek: add infrasys clock mux support by developer · Fri Sep 09 20:00:04 2022 +0800
  38. fd47f76 clk: mediatek: add support to configure clock driver parent by developer · Fri Sep 09 20:00:01 2022 +0800
  39. 2dc4caa clk: mediatek: add CLK_BYPASS_XTAL flag to allow bypassing searching clock parent of xtal clock by developer · Fri Sep 09 19:59:59 2022 +0800
  40. 4b1c515 clk: mediatek: Add MT8183 clock driver by Fabien Parent · Sat Oct 17 12:52:15 2020 +0200
  41. 65130cd dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET() by Simon Glass · Mon Dec 28 20:34:56 2020 -0700
  42. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  43. e51b57a clk: mt7622: add needed clocks for ssusb-node by Frank Wunderlich · Thu Aug 20 16:37:55 2020 +0200
  44. cee08a1 reset: drop unnecessary comment for pciesys by Frank Wunderlich · Thu Aug 20 16:37:53 2020 +0200
  45. 8bdcb39 reset: add basic reset controller for pciesys by Frank Wunderlich · Thu Aug 13 10:20:46 2020 +0200
  46. 420e8bf clk: mediatek: add pciesys support for MT7622 SoC by developer · Mon Aug 10 16:17:08 2020 +0800
  47. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  48. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
  49. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  50. 94fc842 clk: mediatek: use unsigned type for returning the clk rate by Fabien Parent · Thu Oct 17 21:02:05 2019 +0200
  51. 65da8e7 clk: mediatek: fix clock-rate overflow problem by developer · Fri Jan 10 16:30:30 2020 +0800
  52. dea5651 clk: mediatek: add driver for MT7622 by developer · Fri Jan 10 16:30:29 2020 +0800
  53. ef45feb clk: mediatek: mt7629: add support for ssusbsys by developer · Thu Jan 09 11:35:04 2020 +0800
  54. 0b5e5f1 clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll by developer · Tue Dec 31 11:29:22 2019 +0800
  55. ba560c7 clk: mediatek: add set_clr_upd mux type flow by developer · Tue Dec 31 11:29:21 2019 +0800
  56. 4a79703 clk: mediatek: add driver support for MT8512 by developer · Tue Dec 31 11:29:20 2019 +0800
  57. 5817d5c clk: mediatek: add driver for MT8518 by developer · Thu Nov 07 19:28:41 2019 +0800
  58. a588d15 clk: MediaTek: add hifsys entry for MT7623 SoC. by developer · Mon Jul 29 22:17:48 2019 +0800
  59. 1fe5ad0 clk: mediatek: add driver for MT8516 by Fabien Parent · Sun Mar 24 16:46:36 2019 +0100
  60. 69463e5 clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags by Fabien Parent · Sun Mar 24 16:46:35 2019 +0100
  61. 0225945 clk: MediaTek: bind ethsys reset controller by developer · Thu Dec 20 16:12:52 2018 +0800
  62. d1b1ffa clk: MediaTek: add clock driver for MT7623 SoC. by developer · Thu Nov 15 10:07:55 2018 +0800
  63. 2186c98 clk: MediaTek: add clock driver for MT7629 SoC. by developer · Thu Nov 15 10:07:54 2018 +0800