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git01.mediatek.com / filogic / uboot / 65db0c9549495adb6faa3a52ab0ca4064b56199f / drivers / ddr / fsl / options.c
  1. c1bf24f driver/ddr/fsl: Fix tXP and tCKE by York Sun · Thu Aug 21 16:13:22 2014 -0700
  2. 79a779b driver/ddr: Restruct driver to allow standalone memory space by York Sun · Fri Aug 01 15:51:00 2014 -0700
  3. edbeee1 drivers/ddr: Fix possible out of bounds error by York Sun · Tue Apr 01 14:20:49 2014 -0700
  4. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · Thu Mar 27 17:54:47 2014 -0700
  5. c459ae6 driver/ddr: Add 256 byte interleaving support by York Sun · Mon Feb 10 13:59:44 2014 -0800
  6. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · Mon Sep 30 09:22:09 2013 -0700[Renamed (97%) from arch/powerpc/cpu/mpc8xxx/ddr/options.c]
  7. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · Wed Sep 25 10:41:19 2013 +0530
  8. 4889c98 powerpc/mpc8xxx: Add x4 DDR device support by York Sun · Tue Jun 25 11:37:47 2013 -0700
  9. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  10. d01babd powerpc/mpc8xxx: Add auto select bank interleaving mode by York Sun · Mon Oct 08 07:44:27 2012 +0000
  11. 98df4d1 powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation by York Sun · Mon Oct 08 07:44:23 2012 +0000
  12. e2cba15 powerpc/mpc8xxx: Move HWCONFIG_BUFFER_SIZE into config.h by York Sun · Fri Aug 17 09:00:54 2012 +0000
  13. e8dc17b powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · Fri Aug 17 08:22:39 2012 +0000
  14. 59cb44c arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warning by Kumar Gala · Wed Nov 09 10:05:21 2011 -0600
  15. 454f507 powerpc/mpc8xxx: Add DDR2 to unified DDR driver by York Sun · Fri Aug 26 11:32:43 2011 -0700
  16. f0345e2 powerpc/mpc8xxx: Move DDR RCW overriding to common code by York Sun · Wed Aug 24 09:40:26 2011 -0700
  17. 3c5ffd4 powerpc/mpc8xxx: fix DDR data width checking by York Sun · Mon Jun 27 13:35:25 2011 -0700
  18. dd803dd powerpc/mpc8xxx: Add 16-bit support for DDR3 by York Sun · Fri May 27 07:25:51 2011 +0800
  19. 5fb9f6f powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram width by York Sun · Fri May 27 07:25:48 2011 +0800
  20. ba0c2eb mpc85xx: Enable unique mode registers and dynamic ODT for DDR3 by York Sun · Mon Jan 10 12:03:00 2011 +0000
  21. 0ac71ea mpc8xxx: Enable ECC on/off control in hwconfig by York Sun · Mon Jan 10 12:02:57 2011 +0000
  22. 7230160 powerpc/8xxx: Add hwconfig APIs to address early parsing used by DDR init by Kumar Gala · Sun Jan 09 11:37:00 2011 -0600
  23. f582d98 powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code by Kumar Gala · Sun Jan 09 14:06:28 2011 -0600
  24. 1714e49 powerpc/8xxx: Improvement to DDR parameters by york · Fri Jul 02 22:25:56 2010 +0000
  25. 4260372 powerpc/8xxx: Enabled address hashing for 85xx by york · Fri Jul 02 22:25:54 2010 +0000
  26. f4f93c6 powerpc/8xxx: Enable quad-rank DIMMs. by york · Fri Jul 02 22:25:53 2010 +0000
  27. 93799ca powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · Fri Jul 02 22:25:52 2010 +0000
  28. 6404209 powerpc/8xxx: Enabled hwconfig for memory interleaving by Kumar Gala · Wed Jul 14 10:04:21 2010 -0500
  29. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/cpu/mpc8xxx/ddr/options.c]
  30. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · Mon Apr 12 22:28:09 2010 -0500[Renamed from cpu/mpc8xxx/ddr/options.c]
  31. 707aa5c fsl-ddr: change the default burst mode for DDR3 by Dave Liu · Fri Mar 05 12:22:00 2010 +0800
  32. 64ee7df fsl-ddr: add the override for write leveling by Dave Liu · Wed Dec 16 10:24:37 2009 -0600
  33. 0f9318f fsl-ddr: Fix the chip-select interleaving issue by Dave Liu · Thu Nov 12 07:26:37 2009 +0800
  34. 4be87b2 fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · Sat Mar 14 12:48:30 2009 +0800
  35. c0f3b3c fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controller by Kumar Gala · Fri Feb 06 09:56:34 2009 -0600
  36. a06d74c fsl-ddr: use the 1T timing as default configuration by Dave Liu · Fri Nov 21 16:31:43 2008 +0800
  37. b135d93 fsl ddr skip interleaving if not supported. by Ed Swarthout · Wed Oct 29 09:21:44 2008 -0500
  38. b834f92 Check DDR interleaving mode by Haiying Wang · Fri Oct 03 12:37:10 2008 -0400
  39. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · Fri Oct 03 12:36:55 2008 -0400
  40. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · Tue Aug 26 15:01:29 2008 -0500