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git01.mediatek.com / filogic / uboot / 629f44fe6af20dddb89a03289ea6a95fa9863440 / drivers / clk / clk_stm32mp1.c
  1. 629f44f clk: stm32mp1: add IPCC clock by Patrick Delaunay · 6 years ago
  2. 7b72653 clk: stm32mp1: no more get ck_usbo_48m in device tree by Patrick Delaunay · 6 years ago
  3. 3247081 clk: stm32: add hardware spinlock clock by Benjamin Gaignard · 6 years ago
  4. 80cb568 stm32mp1: clk: support digital bypass by Patrick Delaunay · 6 years ago
  5. 201f0d5 stm32mp1: clk: add ADC clock gating by Patrick Delaunay · 6 years ago
  6. effe2b4 stm32mp1: clk: update Ethernet clock gating by Patrick Delaunay · 6 years ago
  7. 8314d2c stm32mp1: clk: add LDTC and DSI clock support by Patrick Delaunay · 6 years ago
  8. 5327d37 stm32mp1: clk: add common function pll_get_fvco by Patrick Delaunay · 6 years ago
  9. a7c0fd6 stm32mp1: clk: define RCC_PLLNCFGR2_SHIFT macro by Patrick Delaunay · 6 years ago
  10. b139a5b misc: stm32: Add STM32MP1 support by Patrick Delaunay · 6 years ago
  11. 4cb3b53 clk: stm32mp1: Add VREF clock gating by Fabrice Gasnier · 7 years ago
  12. 8b0c8a1 SPDX: Convert all of our multiple license tags to Linux Kernel style by Tom Rini · 7 years ago
  13. bf7d944 clock: stm32mp1: add stgen clock source change support by Patrick Delaunay · 7 years ago
  14. f11398e clk: stm32mp1: add clock tree initialization by Patrick Delaunay · 7 years ago
  15. e6ab627 clk: add driver for stm32mp1 by Patrick Delaunay · 7 years ago