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git01.mediatek.com / filogic / uboot / 60dd2d438be48befe3c2ff0a2230044318819655 / arch / arm / mach-sunxi / dram_sun8i_h3.c
  1. d414c38 sunxi: DRAM: fix H3 DRAM size display on aarch64 by Andre Przywara · 8 years ago
  2. c98f5cc sunxi: H3/A64: fix non-ODT setting by Andre Przywara · 8 years ago
  3. f613817 sunxi: A64: use H3 DRAM initialization code for A64 as well by Jens Kuske · 8 years ago
  4. 8bbadc8 sunxi: H3: add DRAM controller single bit delay support by Jens Kuske · 8 years ago
  5. 3e79758 sunxi: H3: add and rename some DRAM contoller registers by Jens Kuske · 8 years ago
  6. 3c31ba9 sunxi: H3: Rework MBUS priority setup by Philipp Tomsich · 8 years ago
  7. d8b9593 sunxi: Fix H3 DRAM impedance calibration on rev. A chips by Jens Kuske · 8 years ago
  8. 8dd84a7 sunxi: Move cpu independent code to mach directory by Alexander Graf · 9 years ago[Renamed from arch/arm/cpu/armv7/sunxi/dram_sun8i_h3.c]
  9. af272a1 sunxi: Fix H3 DRAM DQ read delay configuration by Jens Kuske · 9 years ago
  10. 53f018e sunxi: Add H3 DRAM initialization support by Jens Kuske · 9 years ago