Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 5cfea4208859c0b5b44d560efc2edec00091a339 / arch / arm / mach-versal / include / mach / sys_proto.h
  1. 58f731a xilinx: zynqmp: Add missing prototype for zynqmp_mmio_write by Algapally Santosh Sagar · Wed Mar 01 03:33:33 2023 -0700
  2. 141cbfd arm64: versal: Define zynqmp_mmio_write() for versal by Michal Simek · Thu Aug 25 06:59:02 2022 -0600
  3. 0768aeb xilinx: zynqmp: synchronize firmware call return payload by Ibai Erkiaga · Tue Aug 04 23:17:26 2020 +0100
  4. 7fbe9be versal: fix versal PM ret payload size by Ibai Erkiaga · Thu Jul 02 00:10:58 2020 +0100
  5. 81efd2a arm64: xilinx: Move firmware functions from platform to driver by Michal Simek · Fri Oct 04 15:45:29 2019 +0200
  6. e50c104 arm64: versal: Clean pm_api_id usage by Michal Simek · Fri Oct 04 15:25:18 2019 +0200
  7. f7a7120 clk: versal: Add clock driver support by Siva Durga Prasad Paladugu · Sun Jun 23 12:24:57 2019 +0530
  8. 21eb5cc arm64: versal: Enable memory mapping via DT by Michal Simek · Mon Apr 29 09:39:09 2019 -0700
  9. 775aa95 arm64: versal: Add new Kconfig SYS_MEM_RSVD_FOR_MMU by Siva Durga Prasad Paladugu · Tue Jan 08 21:47:26 2019 +0530
  10. 4b066a1 arm64: versal: Add support for new Xilinx Versal ACAPs by Michal Simek · Wed Aug 22 14:55:27 2018 +0200