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git01.mediatek.com
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filogic
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uboot
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5ca5dd5ae832c5f06fae508f742f8109991aad75
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drivers
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clk
495e80f
Correct SPL uses of CMD_CLK
by Simon Glass
· Sun Feb 05 15:36:26 2023 -0700
06d8f97
clk: renesas: rcar-gen3: Factor out CPG library
by Hai Pham
· Thu Jan 26 21:06:07 2023 +0100
6811b57
clk: renesas: Add R8A77970 SD0H/SD0 clocks for SDHI
by Hai Pham
· Thu Jan 26 21:06:06 2023 +0100
4dae076
clk: renesas: Switch to new SD clock handling
by Hai Pham
· Sun Jan 29 02:50:22 2023 +0100
85e691e
clk: renesas: Handle E3/D3 RPCSRC clock
by Hai Pham
· Thu Jan 26 21:06:04 2023 +0100
e83700a
clk: renesas: Introduce and use rcar_clk_get_rate64_div_table function
by Hai Pham
· Thu Jan 26 21:06:03 2023 +0100
b2970fd
clk: renesas: Convert Gen2/Gen3 clock tables to clk-provider struct clk_div_table
by Marek Vasut
· Thu Jan 26 21:06:02 2023 +0100
1bd2521
clk: renesas: Drop core param from gen3_clk_get_rate64_pll_mul_reg
by Marek Vasut
· Thu Jan 26 21:02:05 2023 +0100
a80b061
clk: renesas: Use pre-defined offset for RPC clocks
by Hai Pham
· Thu Jan 26 21:02:04 2023 +0100
f6b3202
clk: renesas: Add and enable CPG reset driver
by Marek Vasut
· Thu Jan 26 21:02:03 2023 +0100
f144d50
clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
by Hai Pham
· Thu Jan 26 21:02:02 2023 +0100
cef5c2f
clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960
by Hai Pham
· Thu Jan 26 21:02:01 2023 +0100
ffdcb5d
clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.1.7
by Marek Vasut
· Sun Jan 29 02:37:50 2023 +0100
d4b102a
clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:59 2023 +0100
43b3fdb
clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:58 2023 +0100
7883e0d
clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:57 2023 +0100
569acef
clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:56 2023 +0100
d1ff7e0
clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:55 2023 +0100
fdc9314
clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:54 2023 +0100
c3bb162
clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:53 2023 +0100
d5b2e95
clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:52 2023 +0100
fd44059
clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:51 2023 +0100
ade5532
clk: renesas: Synchronize R8A7795 H3 clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:50 2023 +0100
0985e0e
clk: renesas: Add dummy SDnH clock
by Hai Pham
· Thu Jan 26 21:01:49 2023 +0100
2a8450f
ARM: dts: rmobile: Synchronize DTs with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:32 2023 +0100
c441863
Merge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
by Tom Rini
· Fri Jan 27 10:15:39 2023 -0500
1467d44
clk: sunxi: Add DE2 display-related clocks/resets
by Samuel Holland
· Mon Nov 28 01:02:24 2022 -0600
d628e67
clk: versal: Return error in case if clock setup failed
by Jay Buddhabhatti
· Tue Jan 10 08:23:44 2023 +0100
674d1b9
clk: rockchip: Add rv1126 clk support
by Jagan Teki
· Wed Dec 14 23:21:00 2022 +0530
9b2f9d1
rockchip: clk: add watchdog clock to px30_clk_enable
by Quentin Schulz
· Mon Nov 14 11:33:46 2022 +0100
a63bea9
Merge tag 'v2023.01-rc4' into next
by Tom Rini
· Mon Dec 19 09:29:55 2022 -0500
9d3bfc3
rockchip: rk3128-cru: sync the clock dt-binding header from Linux
by Johan Jonker
· Fri Sep 09 22:18:45 2022 +0200
2d982b7
arm: mach-k3: am62a: introduce auto-generated SoC data
by Bryan Brattlof
· Thu Nov 03 19:13:56 2022 -0500
3db088a
clk: stm32mp13: introduce STM32MP13 RCC driver
by Gabriel Fernandez
· Thu Nov 24 11:36:04 2022 +0100
6a5dccc
global: Move remaining CONFIG_SYS_* to CFG_SYS_*
by Tom Rini
· Wed Nov 16 13:10:41 2022 -0500
7bde2d2
clk: microchip: mpfs: fix criticality of peripheral clocks
by Conor Dooley
· Tue Oct 25 08:58:48 2022 +0100
73a1d60
clk: microchip: mpfs: fix periph clk parentage
by Conor Dooley
· Tue Oct 25 08:58:47 2022 +0100
d4bbef0
clk: microchip: mpfs: fix reference clock handling
by Conor Dooley
· Tue Oct 25 08:58:46 2022 +0100
4a182e0
clk: microchip: mpfs: convert parent rate acquistion to get_get_rate()
by Conor Dooley
· Tue Oct 25 08:58:45 2022 +0100
62baa61
Merge tag 'u-boot-imx-20221024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
by Tom Rini
· Mon Oct 24 10:04:30 2022 -0400
3e5255c
clk-imx8mm: Only build QSPI clocks when CONFIG_NXP_FSPI=y
by Fabio Estevam
· Mon Sep 26 13:40:11 2022 -0300
0b3fa1b
clk-imx8mm: Only build ecspi clocks when CONFIG_DM_SPI=y
by Fabio Estevam
· Mon Sep 26 13:40:10 2022 -0300
704aa87
clk-imx8mm: Move CLK_ENET_AXI to the non-SPL section
by Fabio Estevam
· Mon Sep 26 13:40:09 2022 -0300
60896e0
clk-imx8mm: Only build PWM clocks in non-SPL code
by Fabio Estevam
· Mon Sep 26 13:40:08 2022 -0300
cc61c58
Merge tag 'u-boot-rockchip-20221020' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
by Tom Rini
· Thu Oct 20 22:32:38 2022 -0400
09131ac
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
by Tom Rini
· Thu Oct 20 09:11:08 2022 -0400
fb3a40d
Merge tag 'clk-2023.01' of https://source.denx.de/u-boot/custodians/u-boot-clk
by Tom Rini
· Thu Oct 20 08:58:25 2022 -0400
135e5f6
k210: fix k210_pll_calc_config()
by Heinrich Schuchardt
· Sun Oct 16 18:12:32 2022 +0200
d867a287
clk: update clk_clean_rate_cache to use private clk struct
by Patrick Delaunay
· Mon Jun 20 15:37:25 2022 +0200
4578349
rockchip: clk: pll: Fix constant typo
by Michal Suchanek
· Wed Sep 28 12:41:29 2022 +0200
0d4d5e4
clk: change return type of clk_get_parent_rate from long long to ulong
by Michal Suchanek
· Wed Sep 28 12:37:57 2022 +0200
7d20cf9
arm: rockchip: rk3399: Program PLL clock for DDR at 50 MHz in documented range
by Xavier Drudis Ferran
· Sat Jul 16 12:31:45 2022 +0200
af74e27
Merge tag 'xilinx-for-v2023.01-rc1-v3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
by Tom Rini
· Tue Oct 11 09:57:08 2022 -0400
e3184f8
clk: versal: Mark versal_clock_setup() as static
by Venkatesh Yadav Abbarapu
· Fri Oct 07 16:25:35 2022 +0530
252e54e
clk: imx: clk-imx8mn add gpmi nand clocks
by Michael Trimarchi
· Tue Aug 30 16:45:20 2022 +0200
29c56cf
clk: imx: gate2 support shared counter and relative clock functions
by Michael Trimarchi
· Tue Aug 30 16:41:38 2022 +0200
686b6e2
clk: nuvoton: Add support for NPCM845
by Jim Liu
· Tue Sep 27 16:45:16 2022 +0800
785be73
Merge tag 'xilinx-for-v2023.01-rc1-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
by Tom Rini
· Mon Sep 26 11:28:14 2022 -0400
d52796d
clk: versal: Enable clock driver for Versal NET
by Jay Buddhabhatti
· Mon Sep 19 14:21:05 2022 +0200
79128da
clk: mediatek: add clock driver support for MediaTek MT7981 SoC
by developer
· Fri Sep 09 20:00:12 2022 +0800
37161fe
clk: mediatek: add clock driver support for MediaTek MT7986 SoC
by developer
· Fri Sep 09 20:00:09 2022 +0800
f724f11
clk: mediatek: add CLK_XTAL support for clock driver
by developer
· Fri Sep 09 20:00:07 2022 +0800
ad5b075
clk: mediatek: add infrasys clock mux support
by developer
· Fri Sep 09 20:00:04 2022 +0800
fd47f76
clk: mediatek: add support to configure clock driver parent
by developer
· Fri Sep 09 20:00:01 2022 +0800
2dc4caa
clk: mediatek: add CLK_BYPASS_XTAL flag to allow bypassing searching clock parent of xtal clock
by developer
· Fri Sep 09 19:59:59 2022 +0800
06ad78d
Merge tag 'u-boot-at91-2023.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
by Tom Rini
· Tue Sep 20 08:49:36 2022 -0400
586c22b
Merge branch 'master' into next
by Tom Rini
· Mon Sep 19 13:19:39 2022 -0400
d469b1a
clk: at91: sam9x60: change parent clock from mck_pres to mck_div
by Mihai Sain
· Tue Jul 19 16:51:59 2022 +0300
60a71f6
clk: imx: Add initial support for i.MXRT1170 clock driver
by Jesse Taube
· Tue Jul 26 01:43:43 2022 -0400
4303cd1
clk: imx: Add i.MXRT11xx pllv3 variant
by Jesse Taube
· Tue Jul 26 01:43:42 2022 -0400
b4c47fd
clk: aspeed: Get HCLK frequency support
by Chin-Ting Kuo
· Fri Aug 19 17:01:02 2022 +0800
e07c1f2
Merge tag 'u-boot-stm32-20220907' of https://source.denx.de/u-boot/custodians/u-boot-stm
by Tom Rini
· Thu Sep 08 08:33:41 2022 -0400
733fa0d
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
by Tom Rini
· Tue Sep 06 09:01:39 2022 -0400
4a1b083
clk: stm32mp: handle ck_usbo_48m clock provided by USBPHYC
by Patrick Delaunay
· Tue Apr 26 14:37:49 2022 +0200
13d7170
dt-bindings: clock: sifive: sync FU740 PRCI clock binding header
by Icenowy Zheng
· Thu Aug 25 16:11:18 2022 +0800
8478944
clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@fe310000
by Michal Suchanek
· Sun Aug 21 09:17:24 2022 +0200
d63726e
treewide: Fix Marek's name and change my e-mail address
by Marek Behún
· Wed Jun 01 17:17:06 2022 +0200
86b561c
reset: sunxi: Reuse the platform data from the clock driver
by Samuel Holland
· Mon May 09 00:29:37 2022 -0500
9031532
clk: sunxi: Convert driver private data to platform data
by Samuel Holland
· Mon May 09 00:29:35 2022 -0500
751c6c6
clk: sunxi: Use a single driver for all variants
by Samuel Holland
· Mon May 09 00:29:34 2022 -0500
1567fdf
reset: sunxi: Get the reset count from the CCU descriptor
by Samuel Holland
· Mon May 09 00:29:33 2022 -0500
a496907
clk: sunxi: Prevent out-of-bounds gate array access
by Samuel Holland
· Mon May 09 00:29:32 2022 -0500
8443650
clk: sunxi: Store the array sizes in the CCU descriptor
by Samuel Holland
· Mon May 09 00:29:31 2022 -0500
d8b34fb
clk: mtmips: add clock driver for MediaTek MT7621 SoC
by developer
· Fri May 20 11:22:36 2022 +0800
89b5381
Merge branch 'next'
by Tom Rini
· Mon Jul 11 10:18:13 2022 -0400
dd8c084
clk/ast2500: Add SD clock
by Joel Stanley
· Thu Jun 23 18:35:32 2022 +0930
68abf0f
clk/ast2600: Adjust eMMC clock names
by Joel Stanley
· Thu Jun 23 18:35:31 2022 +0930
50ddb95
clk/aspeed: Add debug message when clock fails
by Joel Stanley
· Thu Jun 23 18:35:30 2022 +0930
8ab9578
drivers: clk: Update license for Intel N5X device
by Teik Heng Chong
· Wed Jun 29 13:51:50 2022 +0800
6fba248
clk: sunxi: Add additional RTC compatible strings
by Samuel Holland
· Sat Apr 30 22:38:36 2022 -0500
528f988
clk: scmi: support SCMI multi-channel
by Etienne Carriere
· Tue May 31 18:09:25 2022 +0200
a1e8751
firmware: scmi: prepare scmi uclass API to multi-channel
by Etienne Carriere
· Tue May 31 18:09:18 2022 +0200
d9ff2b9
Merge branch 'master' into next
by Tom Rini
· Mon Jun 20 14:40:59 2022 -0400
1242761
clk: Add directory for STM32 clock drivers
by Patrick Delaunay
· Thu May 19 17:56:45 2022 +0200
b1452ea
clk: imx8mp: use usb_core_ref for usb_root_clk
by Andrey Zhizhikin
· Fri Jun 03 17:15:22 2022 +0200
fa9087c
clk: imx8mp: fix root clock names for ecspi
by Andrey Zhizhikin
· Fri Jun 03 17:15:21 2022 +0200
a9768c9
arm: mach-k3: am62: Introduce autogenerated SoC data
by Suman Anna
· Wed May 25 13:38:43 2022 +0530
2d1864f
clk: sunxi: add and use dummy gate clocks
by Andre Przywara
· Thu May 05 01:25:43 2022 +0100
3e9aa0b
clk: sunxi: add PIO bus gate clocks
by Andre Przywara
· Wed May 04 22:10:28 2022 +0100
fdad831
clk: sunxi: h6_r: Correct the driver name
by Samuel Holland
· Sat Apr 23 16:07:16 2022 -0500
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