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fsl_ddr_dimm_params.h
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
d3e6816
Revert "drivers/ddr/fsl: Dual-license DDR driver"
by Tom Rini
· Wed Feb 14 21:34:05 2018 -0500
6d49eda
drivers/ddr/fsl: Dual-license DDR driver
by York Sun
· Wed Feb 07 11:47:22 2018 -0800
74588bb
drivers/ddr/fsl: Cleanup unused variable
by York Sun
· Mon Jan 29 09:44:38 2018 -0800
bc2f32a
drivers/ddr/fsl: Add calculation of register control words
by York Sun
· Mon Jan 29 10:24:08 2018 -0800
6db4fdd
drivers/ddr/fsl: Add 3DS RDIMM support
by York Sun
· Mon Jan 29 09:44:35 2018 -0800
e237880
Add more SPDX-License-Identifier tags
by Tom Rini
· Thu Jan 14 22:05:13 2016 -0500
2c0b62d
driver/ddr/fsl: Add support for multiple DDR clocks
by York Sun
· Tue Jan 06 13:18:50 2015 -0800
2896cb7
driver/ddr/fsl: Add DDR4 support to Freescale DDR driver
by York Sun
· Thu Mar 27 17:54:47 2014 -0700
f062659
Driver/DDR: Moving Freescale DDR driver to a common driver
by York Sun
· Mon Sep 30 09:22:09 2013 -0700
[Renamed from arch/powerpc/include/asm/fsl_ddr_dimm_params.h]
0b81093
mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it
by Valentin Longchamp
· Fri Oct 18 11:47:20 2013 +0200
4a71741
powerpc: Fix CamelCase warnings in DDR related code
by Priyanka Jain
· Wed Sep 25 10:41:19 2013 +0530
4889c98
powerpc/mpc8xxx: Add x4 DDR device support
by York Sun
· Tue Jun 25 11:37:47 2013 -0700
794c692
powerpc/mpc8xxx: Add fine timing support for DDR3
by York Sun
· Fri Aug 17 08:22:37 2012 +0000
fbe6595
powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address Parity
by York Sun
· Thu Mar 17 11:18:10 2011 -0700
de87932
powerpc/8xxx: Enable DDR3 RDIMM support
by york
· Fri Jul 02 22:25:55 2010 +0000
88fbf93
Move arch/ppc to arch/powerpc
by Stefan Roese
· Thu Apr 15 16:07:28 2010 +0200
[Renamed from arch/ppc/include/asm/fsl_ddr_dimm_params.h]
3cba3c1
Move architecture-specific includes to arch/$ARCH/include/asm
by Peter Tyser
· Mon Apr 12 22:28:08 2010 -0500
[Renamed from include/asm-ppc/fsl_ddr_dimm_params.h]
4be87b2
fsl-ddr: add the DDR3 SPD infrastructure
by Dave Liu
· Sat Mar 14 12:48:30 2009 +0800
fa44036
Pass dimm parameters to populate populate controller options
by Haiying Wang
· Fri Oct 03 12:36:55 2008 -0400
[Renamed from cpu/mpc8xxx/ddr/ddr1_2_dimm_params.h]
124b082
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
by Kumar Gala
· Tue Aug 26 15:01:29 2008 -0500