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git01.mediatek.com / filogic / uboot / 5bf06ed603848c1db0aed09771e7997052008385 / board / renesas / sh7757lcr
  1. 6739591 sh: Add a flag which controls the DDR ECC mode of sh7757lcr by Nobuhiro Iwamatsu · Mon Oct 31 13:16:02 2011 +0900
  2. ab2b7e1 punt unused clean/distclean targets by Mike Frysinger · Thu Oct 13 06:54:57 2011 +0000
  3. 4513327 sh: sh7757lcr: Add KEEP order to start.o section by Yoshihiro Shimoda · Tue Jul 05 17:15:16 2011 +0900
  4. 1a0ce28 Coding Style cleanup: remove trailing empty lines by Wolfgang Denk · Sun Mar 27 21:48:08 2011 +0200
  5. cedbf4b rename _end to __bss_end__ by Po-Yu Chuang · Tue Mar 01 22:59:59 2011 +0000
  6. a7d382c sh: add support for sh7757lcr board by Yoshihiro Shimoda · Wed Feb 02 10:05:36 2011 +0900