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git01.mediatek.com / filogic / uboot / 575029d66b2c5f52fc25b1924b5db7b2befca917 / drivers / ddr
  1. 575029d ddr: altera: Clean up set_rank_and_odt_mask() part 3 by Marek Vasut · 9 years ago
  2. 9252308 ddr: altera: Clean up set_rank_and_odt_mask() part 2 by Marek Vasut · 9 years ago
  3. 0b5e257 ddr: altera: Clean up set_rank_and_odt_mask() part 1 by Marek Vasut · 9 years ago
  4. be333bc ddr: altera: Clean up mem_precharge_and_activate() by Marek Vasut · 9 years ago
  5. 0f0840d ddr: altera: Clean up mem_config() by Marek Vasut · 9 years ago
  6. fe5aa45 ddr: altera: Clean up phy_mgr_initialize() by Marek Vasut · 9 years ago
  7. 092a1ef ddr: altera: Clean up run_mem_calibrate() by Marek Vasut · 9 years ago
  8. acaaff7 ddr: altera: Rename initialize() to phy_mgr_initialize() by Marek Vasut · 9 years ago
  9. 5da0f5b ddr: altera: Init my_param and my_gbl by Marek Vasut · 9 years ago
  10. b0563cf ddr: altera: Rework initialize_tracking() by Marek Vasut · 9 years ago
  11. e5f2cf7 ddr: altera: Fix ad-hoc iterative division implementation by Marek Vasut · 9 years ago
  12. 42e7860 ddr: altera: Minor clean up of set_jump_as_return() by Marek Vasut · 9 years ago
  13. c577ab5 ddr: altera: Factor out common code by Marek Vasut · 9 years ago
  14. 8bf9227 ddr: altera: Factor out instruction loading from rw_mgr_mem_initialize() by Marek Vasut · 9 years ago
  15. 788870f ddr: altera: Clean up scc_mgr_apply_group_all_out_delay_add_all_ranks() by Marek Vasut · 9 years ago
  16. 484fb3b ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 2 by Marek Vasut · 9 years ago
  17. 20bfb9d ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 1 by Marek Vasut · 9 years ago
  18. 62d3c69 ddr: altera: Clean up scc_mgr_zero_group() by Marek Vasut · 9 years ago
  19. 08bcb98 ddr: altera: Clean up scc_mgr_zero_all() by Marek Vasut · 9 years ago
  20. d4d3de2 ddr: altera: Extract scc_mgr_set_hhp_extras() by Marek Vasut · 9 years ago
  21. 3b8e5b0 ddr: altera: Clean up scc_mgr_set_hhp_extras() by Marek Vasut · 9 years ago
  22. 122e1f3 ddr: altera: Clean up scc_mgr_*_delay() args by Marek Vasut · 9 years ago
  23. cd64950 ddr: altera: Clean up scc_mgr_apply_group_dq_out1_delay() by Marek Vasut · 9 years ago
  24. e62f691 ddr: altera: Clean up scc_mgr_set_oct_out1_delay() by Marek Vasut · 9 years ago
  25. 0341de4 ddr: altera: Clean up scc_set_bypass_mode() by Marek Vasut · 9 years ago
  26. 5a4379e ddr: altera: Clean up scc_mgr_load_dqs_for_write_group() by Marek Vasut · 9 years ago
  27. 1d3cde3 ddr: altera: Implement universal scc_mgr_set_all_ranks() by Marek Vasut · 9 years ago
  28. 4972282 ddr: altera: Shuffle around scc_mgr_set_*all_ranks() by Marek Vasut · 9 years ago
  29. 8957b49 ddr: altera: Clean up scc_mgr_initialize() by Marek Vasut · 9 years ago
  30. 303a3dc ddr: altera: Implement universal scc manager config function by Marek Vasut · 9 years ago
  31. 7481b69 ddr: altera: Reorder scc manager functions by Marek Vasut · 9 years ago
  32. cab8079 ddr: altera: Clean up scc manager function args by Marek Vasut · 9 years ago
  33. 6eeb747 ddr: altera: Clean up reg_file_set*() by Marek Vasut · 9 years ago
  34. 0c9f3cb ddr: altera: Clean up initialize_hps_phy() by Marek Vasut · 9 years ago
  35. a17ae0f ddr: altera: Clean up initialize_reg_file() by Marek Vasut · 9 years ago
  36. ea9771b ddr: altera: Clean up hc_initialize_rom_data() by Marek Vasut · 9 years ago
  37. b545096 ddr: altera: Massage addr into I/O accessors by Marek Vasut · 9 years ago
  38. cd5d38e ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directly by Marek Vasut · 9 years ago
  39. 33acf0f ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS by Marek Vasut · 9 years ago
  40. a334010 ddr: altera: Pluck out remaining sdr_get_addr() calls by Marek Vasut · 9 years ago
  41. c3b9b0f ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_mgr_.*->.*) by Marek Vasut · 9 years ago
  42. 0dcb9e8 ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_rw_load.*->.*) by Marek Vasut · 9 years ago
  43. 81df0a2 ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_scc_mgr->.*) by Marek Vasut · 9 years ago
  44. 341ceec ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_reg_file->.*) by Marek Vasut · 9 years ago
  45. 1fa9589 ddr: altera: Zap invocation of sdr_get_addr((u32 *)BASE_RW_MGR)" by Marek Vasut · 9 years ago
  46. 6283b4c ddr: altera: Clean up ugly casts in sdram_calibration_full() by Marek Vasut · 9 years ago
  47. f84348d ddr: altera: Minor indent fix in set_rank_and_odt_mask() by Marek Vasut · 9 years ago
  48. 0eacf7e ddr: altera: Fix debug message format in sequencer by Marek Vasut · 9 years ago
  49. 452d639 ddr: altera: Fix typo in mp_threshold1 programming by Marek Vasut · 9 years ago
  50. e08c559 ddr: altera: Move struct sdram_prot_rule prototype by Marek Vasut · 9 years ago
  51. 43bb47e arm: socfpga: Move sdram_config.h to board dir by Marek Vasut · 9 years ago
  52. 135cc7f driver/ddr/altera: Add the sdram calibration portion by Dinh Nguyen · 10 years ago
  53. 429642c driver/ddr/altera: Add DDR driver for Altera's SDRAM controller by Dinh Nguyen · 10 years ago
  54. 999273f drivers/ddr/fsl: Adjust bstopre value by York Sun · 9 years ago
  55. 61cee0a arm: mvebu: a38x: Use correct PEX register access macros by Stefan Roese · 9 years ago
  56. 5ffceb8 arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr by Stefan Roese · 10 years ago
  57. eb753e9 arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory by Stefan Roese · 10 years ago
  58. b10d1b7 driver/ddr/fsl: Add a hook to update SPD address by York Sun · 10 years ago
  59. b1f81f0 arm: mvebu: db-mv784mp-gp: Fix ECC I2C address by Stefan Roese · 10 years ago
  60. 1f8d706 driver/ddr/fsl: Add workaround for DDR erratum A008511 by York Sun · 10 years ago
  61. b6a35f8 driver/ddr/fsl: Add built-in memory test for DDR4 driver by York Sun · 10 years ago
  62. fc63b28 driver/ddr/fsl: Fix driver to support empty first slot by York Sun · 10 years ago
  63. 55eb5fa drivers/ddr/fsl: Update DDR driver for DDR4 by York Sun · 10 years ago
  64. 6aff153 MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT register by Curt Brune · 10 years ago
  65. 8ced050 driver/ddr/fsl: Add sync of refresh by York Sun · 10 years ago
  66. 5e52647 driver/ddr/fsl: Fix a typo in timing_cfg_8 calculation by York Sun · 10 years ago
  67. 2c0b62d driver/ddr/fsl: Add support for multiple DDR clocks by York Sun · 10 years ago
  68. d429c5f driver/ddr/fsl: Add workround for erratumn A008514 by York Sun · 10 years ago
  69. 8675fac driver/ddr/fsl: Add workaround for A008336 by York Sun · 10 years ago
  70. 63f5771 driver/ddr/fsl: Adjust CAS to preamble override for emulator by York Sun · 10 years ago
  71. ae6223d arm: mvebu: drivers/ddr: Add DDR3 driver with training code from Marvell bin_hdr by Stefan Roese · 10 years ago
  72. 70acb34 arm/ls1021a: Add workaround for DDR erratum A008378 by York Sun · 10 years ago
  73. 1b07ef1 driver/ddr/fsl: Fix MRC_CYC calculation for DDR3 by York Sun · 10 years ago
  74. 064f126 fsl/sleep: updated the deep sleep framework for QorIQ platforms by Tang Yuantian · 10 years ago
  75. b5d606a driver/ddr/fsl: Add workaround for faulty SPD by York Sun · 10 years ago
  76. fbce88c driver/ddr/fsl: Adjust timing_cfg_0 to better support two DDR slots by York Sun · 10 years ago
  77. db20464 linux/kernel.h: sync min, max, min3, max3 macros with Linux by Masahiro Yamada · 10 years ago
  78. a8b3d52 driver/ddr/fsl: Fix DDR4 driver by York Sun · 10 years ago
  79. c1bf24f driver/ddr/fsl: Fix tXP and tCKE by York Sun · 10 years ago
  80. 79a779b driver/ddr: Restruct driver to allow standalone memory space by York Sun · 10 years ago
  81. e0f6046 driver/ddr/fsl: Add support of overriding chip select write leveling by York Sun · 10 years ago
  82. 132b5d9 driver/ddr/freescale: Fix DDR3 driver for ARM by York Sun · 10 years ago
  83. 5d6c626 driver/ddr/freescale: Add support of accumulate ECC by York Sun · 10 years ago
  84. f0e4f6d driver/ddr: Fix DDR register timing_cfg_8 by York Sun · 10 years ago
  85. 157e72d driver/ddr: Fix DDR4 driver for ARM by York Sun · 10 years ago
  86. ff5ca8d driver/ddr/fsl: Fix printing unspecified module info for DDR4 by York Sun · 10 years ago
  87. 9982579 powerpc/mpc85xx: Add workaround for DDR erratum A004508 by York Sun · 11 years ago
  88. be6aafc Add cli_ prefix to readline functions by Simon Glass · 11 years ago
  89. dec3c01 move CLI prototypes to cli.h and add comments by Simon Glass · 11 years ago
  90. a7364af mpc85xx/t104x: Add deep sleep framework support by Tang Yuantian · 11 years ago
  91. edbeee1 drivers/ddr: Fix possible out of bounds error by York Sun · 11 years ago
  92. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 11 years ago
  93. c459ae6 driver/ddr: Add 256 byte interleaving support by York Sun · 11 years ago
  94. 3a0916d Driver/ddr: Add support of different DDR base address by York Sun · 11 years ago
  95. 29647ab driver/ddr: Change Freescale ARM DDR driver to support both big and little endian by York Sun · 11 years ago
  96. 0c88c81 powerpc/mpc85xx: Revise workaround for DDR-A003 by York Sun · 11 years ago
  97. 6446f1e Driver/DDR: Update DDR driver to allow non-zero base address by York Sun · 11 years ago
  98. 63c91cd powerpc/mpc8xxx: Extend DDR registers' fields by York Sun · 11 years ago
  99. 461c939 Driver/DDR: Add Freescale DDR driver for ARM by York Sun · 11 years ago
  100. a21803d Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx by York Sun · 11 years ago