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git01.mediatek.com / filogic / uboot / 54fb0a47d11fe92095d6b4bb143ced8ff456fe4f / drivers / spi / rk_spi.c
  1. a962243 clk: convert API to match reset/mailbox style by Stephen Warren · Fri Jun 17 09:44:00 2016 -0600
  2. c45aec9 rockchip: spi: Remove the explicit pinctrl setting by Simon Glass · Thu Jan 21 19:44:12 2016 -0700
  3. 2c9693c rockchip: spi: Correct chip-enable code by Simon Glass · Thu Jan 21 19:44:11 2016 -0700
  4. 58a52e8 rockchip: spi: Implement the delays by Simon Glass · Thu Jan 21 19:44:10 2016 -0700
  5. f9ed818 rockchip: spi: Correct the bus init code by Simon Glass · Thu Jan 21 19:44:04 2016 -0700
  6. 30508e9 rockchip: spi: Remember the last speed to avoid re-setting it by Simon Glass · Thu Jan 21 19:44:03 2016 -0700
  7. f2e033f rockchip: spi: Avoid setting the pinctrl twice by Simon Glass · Thu Jan 21 19:43:44 2016 -0700
  8. a95049e rockchip: spi: Update the driver to use the new clock ID by Simon Glass · Thu Jan 21 19:43:43 2016 -0700
  9. 7ccac29 spi: rk_spi: Fix debug format warning by Tom Rini · Sun Jan 17 02:42:41 2016 +0000
  10. d1c1377 rockchip: Add SPI driver by Simon Glass · Tue Sep 01 19:19:37 2015 -0600