Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 541f62c2f923a1ae4b182ce19d45830154f7e264 / drivers / clk / renesas / Makefile
  1. 3434a5f clk: renesas: Import R8A774C0 clock tables from Linux 5.9 by Lad Prabhakar · Fri Oct 16 08:37:14 2020 +0100
  2. eb6474c clk: renesas: Add R8A774E1 clock tables by Biju Das · Wed Oct 14 18:17:36 2020 +0100
  3. 69159a2 clk: renesas: Add R8A774B1 clock tables by Biju Das · Wed Oct 14 18:17:35 2020 +0100
  4. 06c4f9b clk: renesas: Add R8A774A1 clock tables by Adam Ford · Tue Jun 30 09:30:08 2020 -0500
  5. d52c6cb clk: renesas: Add R8A77980 V3H clock tables by Marek Vasut · Mon Jul 29 19:59:44 2019 +0200
  6. 98c2058 clk: renesas: Add R8A77965 clock tables by Marek Vasut · Mon Mar 04 13:36:13 2019 +0100
  7. a6b456d clk: renesas: Add R8A77990 E3 clock tables by Marek Vasut · Thu Apr 26 10:19:03 2018 +0200
  8. 3fd0b09 clk: renesas: Import R8A7794 E2 clock tables by Marek Vasut · Wed Jan 17 23:39:57 2018 +0100
  9. 5f854a3 clk: renesas: Import R8A7792 V2H clock tables by Marek Vasut · Wed Jan 17 23:39:10 2018 +0100
  10. efa4fb1 clk: renesas: Import R8A7791/R8A7793 M2 clock tables by Marek Vasut · Mon Jan 08 16:38:51 2018 +0100
  11. b8379d6 clk: renesas: Import R8A7790 H2 clock tables by Marek Vasut · Wed Jan 17 23:14:25 2018 +0100
  12. f63b295 clk: renesas: Add Gen2 clock core by Marek Vasut · Mon Jan 08 16:38:51 2018 +0100
  13. e11008b clk: renesas: Split out code shared between Gen2 and Gen3 by Marek Vasut · Mon Jan 15 16:44:39 2018 +0100
  14. 1a10f19 clk: renesas: Make clock tables Kconfig configurable by Marek Vasut · Mon Jan 08 16:32:38 2018 +0100
  15. 4eb4e6e clk: renesas: Split RCar Gen3 driver by Marek Vasut · Mon Jan 08 14:01:40 2018 +0100
  16. f3b8bf7 clk: rmobile: Add RCar Gen3 clock driver by Marek Vasut · Fri Jul 21 23:18:03 2017 +0200