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git01.mediatek.com / filogic / uboot / 53a442a0dd6bfe790f4cf02f3a3f446ed85607f9 / include / fsl_ddr_dimm_params.h
  1. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  2. d3e6816 Revert "drivers/ddr/fsl: Dual-license DDR driver" by Tom Rini · 7 years ago
  3. 6d49eda drivers/ddr/fsl: Dual-license DDR driver by York Sun · 7 years ago
  4. 74588bb drivers/ddr/fsl: Cleanup unused variable by York Sun · 7 years ago
  5. bc2f32a drivers/ddr/fsl: Add calculation of register control words by York Sun · 7 years ago
  6. 6db4fdd drivers/ddr/fsl: Add 3DS RDIMM support by York Sun · 7 years ago
  7. e237880 Add more SPDX-License-Identifier tags by Tom Rini · 9 years ago
  8. 2c0b62d driver/ddr/fsl: Add support for multiple DDR clocks by York Sun · 10 years ago
  9. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 11 years ago
  10. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed from arch/powerpc/include/asm/fsl_ddr_dimm_params.h]
  11. 0b81093 mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it by Valentin Longchamp · 11 years ago
  12. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  13. 4889c98 powerpc/mpc8xxx: Add x4 DDR device support by York Sun · 11 years ago
  14. 794c692 powerpc/mpc8xxx: Add fine timing support for DDR3 by York Sun · 12 years ago
  15. fbe6595 powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address Parity by York Sun · 14 years ago
  16. de87932 powerpc/8xxx: Enable DDR3 RDIMM support by york · 14 years ago
  17. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/include/asm/fsl_ddr_dimm_params.h]
  18. 3cba3c1 Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · 15 years ago[Renamed from include/asm-ppc/fsl_ddr_dimm_params.h]
  19. 4be87b2 fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  20. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago[Renamed from cpu/mpc8xxx/ddr/ddr1_2_dimm_params.h]
  21. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago