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git01.mediatek.com / filogic / uboot / 5270bde6bb3af9eef494063b03c5d8f1260a961d / board / freescale / imx / ddr / mx6q_4x_mt41j128.cfg
  1. 7bccdae imx: mx6q DDR3 init: Benefit from available CL = 7 by Benoît Thébaudeau · 12 years ago
  2. d152f63 imx: mx6q DDR3 init: Fix MR0.PPD by Benoît Thébaudeau · 12 years ago
  3. 4f81bd3 imx: mx6q DDR3 init: Fix RST_to_CKE by Benoît Thébaudeau · 12 years ago
  4. 6e4651d imx: mx6q DDR3 init: Fix SDE_to_RST by Benoît Thébaudeau · 12 years ago
  5. f8984cd imx: mx6q DDR3 init: Fix tXPR by Benoît Thébaudeau · 12 years ago
  6. 2ce6167 imx: mx6q DDR3 init: Fix tMRD by Benoît Thébaudeau · 12 years ago
  7. a18d786 imximage.cfg: run files through C preprocessor by Troy Kisky · 12 years ago
  8. 4409384 mx6q: Factor out common DDR3 init code by Fabio Estevam · 12 years ago[Renamed from board/freescale/mx6qsabrelite/imximage.cfg]
  9. 5e4ecda mx6: Avoid writing to read-only bits in imximage.cfg by Vikram Narayanan · 12 years ago
  10. 570c607 mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platform by Eric Nelson · 13 years ago
  11. 0238468 i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite board by Jason Liu · 13 years ago