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filogic
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uboot
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504514b00dee7b6b11adc1b522cc88a2bce688ac
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arch
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arm
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include
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asm
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armv8
/
mmu.h
630a794
armv8: always use current exception level for TCR_ELx access
by Andre Przywara
· Tue Jun 14 00:11:10 2022 +0100
11af9ed
armv8: Fix TCR 64-bit writes
by Andre Przywara
· Mon May 09 17:08:49 2022 +0100
f11478f
common: Move hang() to the same header as panic()
by Simon Glass
· Sat Dec 28 10:45:07 2019 -0700
401885a
Use _AC and UL macros from linux/const.h
by Baruch Siach
· Sun Nov 11 12:31:01 2018 +0200
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
e0e9871
armv8: mmu: fix page table mapping
by Peng Fan
· Tue Nov 28 10:31:28 2017 +0800
d2eb8c1
armv8: mmu: add space around operator
by Andy Yan
· Thu Aug 17 15:55:50 2017 +0800
de708cd
armv8: mmu: remove unused macro definition
by Andy Yan
· Thu Aug 17 15:55:01 2017 +0800
5bb14e0
armv8: mmu: Add a function to change mapping attributes
by York Sun
· Mon Mar 06 09:02:33 2017 -0800
9fcee53
move UL() macro from armv8/mmu.h into common.h
by Andre Przywara
· Mon Jan 02 11:48:30 2017 +0000
c7104e5
armv8: mmu: Add support of non-identical mapping
by York Sun
· Fri Jun 24 16:46:22 2016 -0700
a81fcd1
armv8: mmu: house cleaning
by York Sun
· Fri Jun 24 16:46:20 2016 -0700
ce0a64e
arm64: Remove non-full-va map code
by Alexander Graf
· Fri Mar 04 01:09:54 2016 +0100
6b3e7ca
thunderx: Move mmu table into board file
by Alexander Graf
· Fri Mar 04 01:09:48 2016 +0100
e317fe8
arm64: Make full va map code more dynamic
by Alexander Graf
· Fri Mar 04 01:09:47 2016 +0100
f03c0e4
arm64: Disable TTBR1 maps in EL1
by Alexander Graf
· Fri Mar 04 01:09:46 2016 +0100
fb74cc1
thunderx: Calculate TCR dynamically
by Alexander Graf
· Fri Mar 04 01:09:45 2016 +0100
78eaa49
armv8: New MMU setup code allowing to use 48+ bits PA/VA
by Sergey Temerkhanov
· Wed Oct 14 09:55:45 2015 -0700
e28e18c
armv8/layerscape: Update MMU table with execute-never bits
by Alison Wang
· Thu Nov 05 11:15:49 2015 +0800
e4e93ea
armv8/fsl_lsch2: Add fsl_lsch2 SoC
by Mingkai Hu
· Mon Oct 26 19:47:51 2015 +0800
a3e45ab
armv8/mmu: Set bits marked RES1 in TCR
by Thierry Reding
· Thu Aug 20 11:52:14 2015 +0200
c2d7076
armv8/mmu: Clean up TCR programming
by Thierry Reding
· Thu Aug 20 11:52:13 2015 +0200
7f8e178
armv8: fsl-lsch3: Rewrite MMU translation table entries
by Alison Wang
· Tue Aug 18 11:22:05 2015 +0800
5d849ac
armv8: Fix TCR macros for shareability attribute
by Zhichun Hua
· Mon Jun 29 15:49:37 2015 +0800
2e3ad39
armv8/fsl-lsch3: Change normal memory shareability
by York Sun
· Tue Jan 06 13:11:22 2015 -0800
ef63194
ARMv8: Adjust MMU setup
by York Sun
· Mon Jun 23 15:15:53 2014 -0700
85fd5f1
arm64: core support
by David Feng
· Sat Dec 14 11:47:35 2013 +0800