1. c251f5b armv8: layerscape: clean exported symbols in spintable.S by Michael Walle · Mon Jun 01 21:53:34 2020 +0200
  2. d082818 armv8: layerscape: remove determine_mp_bootpg() by Michael Walle · Mon Jun 01 21:53:30 2020 +0200
  3. f056e0f armv8: layerscape: properly use CPU_RELEASE_ADDR by Michael Walle · Mon Jun 01 21:53:26 2020 +0200
  4. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  5. a6231fe armv8: Remove duplicate definition for IH_ARCH_ARM and IH_ARCH_ARM64 by Alison Wang · Thu Jun 08 16:15:14 2017 +0800
  6. aec3b14 arm: psci: make psci usable on single core socs by Yuantian Tang · Wed Apr 19 13:27:39 2017 +0800
  7. 876c7e1 armv8: fsl-layerscape: SMP support for loading 32-bit OS by Alison Wang · Thu Nov 10 10:49:04 2016 +0800
  8. 73818d5 armv8: Support loading 32-bit OS in AArch32 execution state by Alison Wang · Thu Nov 10 10:49:03 2016 +0800
  9. ed7fbe3 armv8: fsl-layerscape: Fix "cpu status" command by York Sun · Tue Sep 13 12:40:30 2016 -0700
  10. 0e58b51 armv8/fsl_lsch3: Change arch to fsl-layerscape by Mingkai Hu · Mon Oct 26 19:47:50 2015 +0800[Renamed (81%) from arch/arm/cpu/armv8/fsl-lsch3/mp.h]
  11. 77a1097 armv8/ls2085a: Fix generic timer clock source by York Sun · Fri Mar 20 19:28:08 2015 -0700
  12. 0cb1942 ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores by Arnab Basu · Tue Jan 06 13:18:41 2015 -0800
  13. 56cc3db armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page by York Sun · Mon Sep 08 12:20:00 2014 -0700