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git01.mediatek.com / filogic / uboot / 4fbb6c2819a1d9517aae43e36da176287c66d2fb / drivers / clk / uniphier / clk-uniphier.h
  1. 52cdec0 clk: uniphier: add PXs3 clock data by Masahiro Yamada · Fri Oct 13 19:22:00 2017 +0900
  2. 4980668 clk: uniphier: rework for better clock tree structure by Masahiro Yamada · Fri Oct 13 19:21:59 2017 +0900
  3. 644f5bf clk: uniphier: add System clock support by Masahiro Yamada · Tue Aug 29 01:06:15 2017 +0900
  4. 8bdfe0a clk: uniphier: rework UniPhier clk driver by Masahiro Yamada · Mon Oct 17 22:18:01 2016 +0900
  5. f18559e clk: uniphier: move U_BOOT_DRIVER entry to core code by Masahiro Yamada · Thu Sep 22 07:42:21 2016 +0900
  6. 630c99f clk: uniphier: constify clock data arrays/structures by Masahiro Yamada · Thu Sep 22 07:42:20 2016 +0900
  7. fa1f73f ARM: uniphier: use (devm_)ioremap() instead of map_sysmem() by Masahiro Yamada · Tue Jul 19 21:56:13 2016 +0900
  8. e4dfb05 clk: uniphier: add Media I/O clock driver for UniPhier SoCs by Masahiro Yamada · Tue Feb 02 21:11:32 2016 +0900