1. 8a52128 riscv: sifive: fu540: enable all cache ways from U-Boot proper by Pragnesh Patel · Fri May 29 12:14:51 2020 +0530
  2. e00653c riscv: sifive: fu540: add SPL configuration by Pragnesh Patel · Fri May 29 11:33:35 2020 +0530
  3. 25269c0 riscv: cpu: fu540: Add support for cpu fu540 by Pragnesh Patel · Fri May 29 11:33:34 2020 +0530