Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 4e287f6768c38ef9c5f8dd5e49c961a0b21a67a3 / arch / arm / mach-sunxi / clock_sun6i.c
  1. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  2. 883b3c0 sunxi: switch PRCM to non-secure on H3/H5 SoCs by Icenowy Zheng · 7 years ago
  3. 3279661 sunxi: add clock configuration of R40 sata by Icenowy Zheng · 8 years ago
  4. 9b4ca92 sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs by Jernej Skrabec · 8 years ago
  5. 143ef79 sunxi: Use H3/A64 DRAM initialization code for R40 by Chen-Yu Tsai · 8 years ago
  6. 5eddcbb sunxi: Set PLL lock enable bits for R40 by Chen-Yu Tsai · 8 years ago
  7. 5fb9743 sunxi: prepare for sharing MACH_SUN8I_H3 config symbol by Andre Przywara · 8 years ago
  8. f613817 sunxi: A64: use H3 DRAM initialization code for A64 as well by Jens Kuske · 8 years ago
  9. ced4a9a sunxi: clocks: Use the correct pattern register for PLL11 by Philipp Tomsich · 8 years ago
  10. 79b59ef sun6i: Restrict some register initialization to Allwinner A31 SoC by Andre Przywara · 8 years ago
  11. 213407e sunxi: Tune H3 DRAM PLL to improve lock time by Jens Kuske · 8 years ago
  12. 8dd84a7 sunxi: Move cpu independent code to mach directory by Alexander Graf · 9 years ago[Renamed from arch/arm/cpu/armv7/sunxi/clock_sun6i.c]
  13. 7969677 sunxi: Fix clock_twi_onoff for sun8i-a83 by Hans de Goede · 9 years ago
  14. f946a87 sunxi: Fix clock_twi_onoff for sun6i by Hans de Goede · 9 years ago
  15. 6daddfe sunxi: Support H3 CCU security switches by Chen-Yu Tsai · 9 years ago
  16. 8d3d7c1 sunxi: Add support for the I2C controller which is part of the PRCM by Jelle van der Waa · 9 years ago
  17. 08f391c sunxi: twi: Enable clocks on sun7i by Olliver Schinagl · 9 years ago
  18. 2b8bd91 sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3 by Siarhei Siamashka · 9 years ago
  19. d6eaadc sun6i: clock: Add support for the mipi pll by Hans de Goede · 9 years ago
  20. 957a72729 sunxi: clock: Add clock_get_pll3() helper function by Hans de Goede · 9 years ago
  21. 0fdbe20 sunxi: Add support for A33 PLL11 (second DRAM pll) by Hans de Goede · 10 years ago
  22. 627bc69 sunxi: Drop pll6 setting from clock_init_uart by Hans de Goede · 10 years ago
  23. 645d4d5 sunxi: Fix PLL1 running at half speed on sun8i by Hans de Goede · 10 years ago
  24. 0bfa774 sun6i: clock_set_pll5: Calculate k and m rather then hardcoding them by Hans de Goede · 10 years ago
  25. 0cbc4cb sun6i: Add a sigma_delta_enable paramter to clock_set_pll5() by Hans de Goede · 10 years ago
  26. 70d7ab5 sunxi: Add video pll clock functions by Hans de Goede · 10 years ago
  27. c27d68d sun6i: Add clock functions needed for SPL / DRAM init by Hans de Goede · 10 years ago
  28. 6ee6388 ARM: sunxi: Add support for using R_UART as console by Chen-Yu Tsai · 10 years ago
  29. 3a04542 ARM: sun6i: Add clock support by Chen-Yu Tsai · 10 years ago