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git01.mediatek.com / filogic / uboot / 4d0f2a1fb0775950a41bfaba5ef55e46735aab2a / drivers / clk / sunxi / clk_h3.c
  1. bc12313 clk: sunxi: Implement SPI clocks, resets by Jagan Teki · Wed Feb 27 20:02:06 2019 +0530
  2. ddf33c1 sunxi: clk: add MMC gates/resets by Andre Przywara · Tue Jan 29 15:54:09 2019 +0000
  3. b490aa5 clk: sunxi: Implement UART resets by Jagan Teki · Sun Dec 30 21:37:31 2018 +0530
  4. 8cf08ea clk: sunxi: Implement UART clocks by Jagan Teki · Sun Dec 30 21:29:24 2018 +0530
  5. 2ee11ff clk: sunxi: Add Allwinner H3/H5 CLK driver by Jagan Teki · Thu Aug 02 15:43:02 2018 +0530