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git01.mediatek.com / filogic / uboot / 4bf81db245e669ebf09db31c799dd62e4906ab33 / drivers / ddr / marvell / a38x / mv_ddr_plat.c
  1. 4bf81db ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 by Chris Packham · 6 years ago
  2. 915f8ee ARM: mvebu: a38x: use non-zero size for ddr scrubbing by Chris Packham · 7 years ago
  3. 3a09e13 ARM: mvebu: a38x: restore support for setting timing by Chris Packham · 7 years ago
  4. 1a07d21 ARM: mvebu: a38x: sync ddr training code with upstream by Chris Packham · 7 years ago