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filogic
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uboot
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4bad2a9b7c556c7399713e5631bb9d7ce0297d50
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drivers
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ddr
/
fsl
/
main.c
39f90ba
board_f: Drop return value from initdram()
by Simon Glass
· Fri Mar 31 08:40:25 2017 -0600
fe84507
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
by York Sun
· Wed Dec 28 08:43:45 2016 -0800
7ae7a0e
drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers
by Ed Swarthout
· Thu Jan 14 12:28:04 2016 -0600
e237880
Add more SPDX-License-Identifier tags
by Tom Rini
· Thu Jan 14 22:05:13 2016 -0500
d957a67
drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3
by York Sun
· Wed Nov 04 09:53:10 2015 -0800
999273f
drivers/ddr/fsl: Adjust bstopre value
by York Sun
· Thu Jul 23 14:04:48 2015 -0700
b10d1b7
driver/ddr/fsl: Add a hook to update SPD address
by York Sun
· Thu May 28 14:54:08 2015 +0530
55eb5fa
drivers/ddr/fsl: Update DDR driver for DDR4
by York Sun
· Thu Mar 19 09:30:26 2015 -0700
8ced050
driver/ddr/fsl: Add sync of refresh
by York Sun
· Tue Jan 06 13:18:55 2015 -0800
2c0b62d
driver/ddr/fsl: Add support for multiple DDR clocks
by York Sun
· Tue Jan 06 13:18:50 2015 -0800
db20464
linux/kernel.h: sync min, max, min3, max3 macros with Linux
by Masahiro Yamada
· Fri Nov 07 03:03:31 2014 +0900
79a779b
driver/ddr: Restruct driver to allow standalone memory space
by York Sun
· Fri Aug 01 15:51:00 2014 -0700
edbeee1
drivers/ddr: Fix possible out of bounds error
by York Sun
· Tue Apr 01 14:20:49 2014 -0700
2896cb7
driver/ddr/fsl: Add DDR4 support to Freescale DDR driver
by York Sun
· Thu Mar 27 17:54:47 2014 -0700
c459ae6
driver/ddr: Add 256 byte interleaving support
by York Sun
· Mon Feb 10 13:59:44 2014 -0800
3a0916d
Driver/ddr: Add support of different DDR base address
by York Sun
· Mon Feb 10 13:59:43 2014 -0800
6446f1e
Driver/DDR: Update DDR driver to allow non-zero base address
by York Sun
· Mon Oct 28 16:36:02 2013 -0700
461c939
Driver/DDR: Add Freescale DDR driver for ARM
by York Sun
· Mon Sep 30 14:20:51 2013 -0700
f062659
Driver/DDR: Moving Freescale DDR driver to a common driver
by York Sun
· Mon Sep 30 09:22:09 2013 -0700
[Renamed (99%) from arch/powerpc/cpu/mpc8xxx/ddr/main.c]
993967a
mpc8xxx: call i2c_set_bus_num in __get_spd
by Valentin Longchamp
· Fri Oct 18 11:47:19 2013 +0200
4a71741
powerpc: Fix CamelCase warnings in DDR related code
by Priyanka Jain
· Wed Sep 25 10:41:19 2013 +0530
3adfb91
powerpc: Use print_size() where appropriate
by Shruti Kanetkar
· Thu Aug 15 11:25:37 2013 -0500
5e15555
powerpc/mpc8xxx: Add memory reset control
by York Sun
· Tue Jun 25 11:37:48 2013 -0700
c21a739
powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff
by York Sun
· Tue Jun 25 11:37:45 2013 -0700
01a8258
powerpc/mpc8xxx: Allow board file to override DDR address assignment
by York Sun
· Mon Mar 25 07:39:35 2013 +0000
fcb60e8
powerpc/mpc8xxx: Fix DDR 3-way interleaving
by York Sun
· Mon Mar 25 07:33:20 2013 +0000
4379438
powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands
by James Yang
· Mon Jan 07 14:01:03 2013 +0000
5025a8d
powerpc/mpc8xxx: Enable entering DDR debugging by key press
by York Sun
· Fri Jan 04 08:13:59 2013 +0000
9b9372f
powerpc/mpc8xxx: Fix DDR SPD failed message
by York Sun
· Mon Oct 08 07:44:28 2012 +0000
016095d
powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT
by York Sun
· Mon Oct 08 07:44:24 2012 +0000
11dd884
powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only
by York Sun
· Fri Aug 17 08:22:42 2012 +0000
e8dc17b
powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving
by York Sun
· Fri Aug 17 08:22:39 2012 +0000
2400904
powerpc/ddr: fix fsl_ddr_get_dimm_params compile error
by Shaohui Xie
· Thu Jun 28 23:36:38 2012 +0000
bd495cf
powerpc/8xxx: Add support for interactive DDR programming interface
by York Sun
· Fri Sep 16 13:21:35 2011 -0700
92b46ac
powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
by York Sun
· Fri Aug 26 11:32:41 2011 -0700
09d8aa8
powerpc/mpc8xxx: Adding fallback to raw timing on supported boards
by York Sun
· Tue Jun 07 09:42:17 2011 +0800
e73cc04
powerpc/mpc8xxx: Enable calculation for fixed DDR chips
by York Sun
· Tue Jun 07 09:42:16 2011 +0800
dd803dd
powerpc/mpc8xxx: Add 16-bit support for DDR3
by York Sun
· Fri May 27 07:25:51 2011 +0800
c68e86c
powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board
by Kumar Gala
· Mon Jan 31 22:18:47 2011 -0600
80ad401
8xxx/ddr: add support to only compute the ddr sdram size
by Haiying Wang
· Wed Dec 01 10:35:31 2010 -0500
2d8ecac
MPC8xxx DDR: align informational prints
by Becky Bruce
· Fri Dec 17 17:17:59 2010 -0600
93799ca
powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4
by york
· Fri Jul 02 22:25:52 2010 +0000
88fbf93
Move arch/ppc to arch/powerpc
by Stefan Roese
· Thu Apr 15 16:07:28 2010 +0200
[Renamed from arch/ppc/cpu/mpc8xxx/ddr/main.c]
29514c7
ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
by Peter Tyser
· Mon Apr 12 22:28:09 2010 -0500
[Renamed from cpu/mpc8xxx/ddr/main.c]
f4018f9
85xx, 86xx: Add common board_add_ram_info()
by Peter Tyser
· Fri Jul 17 10:14:48 2009 -0500
68ef4bd
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
by Kumar Gala
· Thu Jun 11 23:42:35 2009 -0500
45eea1d
fsl-ddr: Allow system to boot if we have more than 4G of memory
by Kumar Gala
· Tue Feb 10 23:53:40 2009 -0600
b135d93
fsl ddr skip interleaving if not supported.
by Ed Swarthout
· Wed Oct 29 09:21:44 2008 -0500
b834f92
Check DDR interleaving mode
by Haiying Wang
· Fri Oct 03 12:37:10 2008 -0400
fa44036
Pass dimm parameters to populate populate controller options
by Haiying Wang
· Fri Oct 03 12:36:55 2008 -0400
272b596
Make DDR interleaving mode work correctly
by Haiying Wang
· Fri Oct 03 12:36:39 2008 -0400
9dbbd7b
Coding style cleanup, update CHANGELOG
by Wolfgang Denk
· Sat Sep 13 02:23:05 2008 +0200
124b082
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
by Kumar Gala
· Tue Aug 26 15:01:29 2008 -0500