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49e7d77be0c916f39ee299193e0061785479160e
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drivers
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ddr
3c6b6fc
arm: mvebu: ddr: Fix compilation warning
by Stefan Roese
· Thu Nov 19 13:50:10 2015 +0100
fae8805
move erratum a008336 and a008514 to soc specific file
by Yao Yuan
· Sat Dec 05 14:59:14 2015 +0800
5a46e43
fsl/ddr: updated ddr errata-A008378 for arm and power SoCs
by Shengzhou Liu
· Fri Nov 20 15:52:04 2015 +0800
77594b3
driver/ddr/fsl: Update timing config for heavy load
by York Sun
· Wed Nov 04 10:03:21 2015 -0800
780ae3d
driver/ddr/fsl: Update workaround for A008511 for vref range
by York Sun
· Wed Nov 04 10:03:20 2015 -0800
d192126
driver/ddr/fsl: Update MR5 RTT park
by York Sun
· Wed Nov 04 10:03:19 2015 -0800
d4d97ef
driver/ddr/fsl: Update DDR4 MR6 for Vref range
by York Sun
· Wed Nov 04 10:03:18 2015 -0800
5cb12f6
driver/ddr/fsl: Update DDR4 RTT values
by York Sun
· Wed Nov 04 10:03:17 2015 -0800
68c19d7
drivers/ddr/fsl: Fix typo in BIST test for DDR4
by York Sun
· Fri Nov 06 09:58:46 2015 -0800
d957a67
drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3
by York Sun
· Wed Nov 04 09:53:10 2015 -0800
77f7ded
armv8: ls2085a: Add support of LS2085A SoC
by Prabhakar Kushwaha
· Mon Nov 09 16:42:20 2015 +0530
122bcfd
armv8: LS2080A: Rename LS2085A to reflect LS2080A
by Prabhakar Kushwaha
· Mon Nov 09 16:42:07 2015 +0530
dea4e33
arm: mvebu: Fix SAR1_CPU_CORE_MASK
by Dirk Eibach
· Wed Oct 28 16:44:14 2015 +0100
0277a6b
arm: mvebu: a38x: Remove unsupported topologies
by Kevin Smith
· Fri Oct 23 17:53:19 2015 +0000
0cab3ec
Various Makefiles: Add SPDX-License-Identifier tags
by Tom Rini
· Tue Nov 10 01:06:16 2015 +0000
6dc192d
drivers/ddr/fsl_ddr: Make SR_IE configurable
by Joakim Tjernlund
· Wed Oct 14 16:32:00 2015 +0200
69bab55
bitops: introduce BIT() definition
by Heiko Schocher
· Mon Sep 07 13:43:52 2015 +0200
eb447cb
ddr: altera: Repair uninited variable
by Marek Vasut
· Mon Aug 10 23:01:43 2015 +0200
af67cf3
ddr: altera: Replace float multiplication with integer one
by Marek Vasut
· Mon Aug 10 22:50:11 2015 +0200
f3345e6
arm: mvebu: Add complete SDRAM ECC scrubbing
by Stefan Roese
· Thu Aug 06 14:43:13 2015 +0200
e4a0f27
arm: mvebu: sdram: Enable ECC support on Armada XP
by Stefan Roese
· Tue Aug 11 17:08:01 2015 +0200
c85b9b3
ddr: altera: sequencer: Clean checkpatch issues
by Marek Vasut
· Sun Aug 02 19:47:01 2015 +0200
8af9ca0
ddr: altera: sequencer: Clean data types
by Marek Vasut
· Sun Aug 02 19:42:26 2015 +0200
5867376
ddr: altera: sequencer: Pluck out misc macros from code
by Marek Vasut
· Sun Aug 02 19:26:55 2015 +0200
324d3f7
ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL
by Marek Vasut
· Sun Aug 02 19:24:12 2015 +0200
32d813e
ddr: altera: sequencer: Zap VFIFO_SIZE
by Marek Vasut
· Sun Aug 02 19:21:56 2015 +0200
f00a6ea
ddr: altera: sequencer: Wrap misc remaining macros
by Marek Vasut
· Sun Aug 02 19:18:47 2015 +0200
7e8f8a7
ddr: altera: sequencer: Pluck out IO_* macros from code
by Marek Vasut
· Sun Aug 02 19:10:58 2015 +0200
3bf9204
ddr: altera: sequencer: Wrap IO_* macros
by Marek Vasut
· Sun Aug 02 19:00:23 2015 +0200
2dfc76b
ddr: altera: sequencer: Pluck out RW_MGR_* macros from code
by Marek Vasut
· Sun Aug 02 18:44:06 2015 +0200
39b620e
ddr: altera: sequencer: Wrap RW_MGR_* macros
by Marek Vasut
· Sun Aug 02 18:12:08 2015 +0200
3384e74
ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init
by Marek Vasut
· Sun Aug 02 17:15:19 2015 +0200
42ed1f2
ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS
by Marek Vasut
· Sun Aug 02 18:40:27 2015 +0200
eb98b38
ddr: altera: sequencer: Zap unused params and macros
by Marek Vasut
· Sun Aug 02 18:27:21 2015 +0200
662a8a6
ddr: altera: sequencer: Move qts-generated files to board dir
by Marek Vasut
· Sun Aug 02 16:55:45 2015 +0200
6772cd9
ddr: altera: sdram: Make sdram_start and sdram_end into u32
by Marek Vasut
· Sat Aug 01 23:12:11 2015 +0200
9114407
ddr: altera: sdram: Minor cleanup in sdram_get_rule()
by Marek Vasut
· Sat Aug 01 23:21:23 2015 +0200
7fce5bc
ddr: altera: sdram: Minor cleanup in sdram_set_rule()
by Marek Vasut
· Sat Aug 01 22:40:48 2015 +0200
b0d848c
ddr: altera: sdram: Add missing kerneldoc
by Marek Vasut
· Sat Aug 01 22:28:30 2015 +0200
116d88f
ddr: altera: sdram: Clean up sdram_write_verify()
by Marek Vasut
· Sat Aug 01 22:26:11 2015 +0200
1796a09
ddr: altera: sdram: Clean up sdram_calculate_size() part 2
by Marek Vasut
· Sat Aug 01 21:47:16 2015 +0200
6d6fbba
ddr: altera: sdram: Clean up sdram_calculate_size() part 1
by Marek Vasut
· Sat Aug 01 21:44:00 2015 +0200
32ada57
ddr: altera: sdram: Introduce socfpga_sdram_get_config()
by Marek Vasut
· Sat Aug 01 21:35:18 2015 +0200
1b1cc10
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8
by Marek Vasut
· Sat Aug 01 22:25:29 2015 +0200
5a4e8ed
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7
by Marek Vasut
· Sat Aug 01 22:03:48 2015 +0200
b81f11c
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6
by Marek Vasut
· Sat Aug 01 21:26:55 2015 +0200
1e271e4
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5
by Marek Vasut
· Sat Aug 01 21:24:31 2015 +0200
71c1a00
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4
by Marek Vasut
· Sat Aug 01 21:21:21 2015 +0200
3a07911
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3
by Marek Vasut
· Sat Aug 01 21:16:20 2015 +0200
7697ff7
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2
by Marek Vasut
· Sat Aug 01 20:58:44 2015 +0200
4fccfa4
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1
by Marek Vasut
· Sat Aug 01 20:39:46 2015 +0200
4f3adbf
ddr: altera: sdram: Introduce socfpga_sdram_config() structure
by Marek Vasut
· Sat Aug 01 20:30:10 2015 +0200
92e8e6f
ddr: altera: sdram: Clean up set_sdr_mp_threshold()
by Marek Vasut
· Sat Aug 01 20:14:11 2015 +0200
44f09cc
ddr: altera: sdram: Clean up set_sdr_mp_pacing()
by Marek Vasut
· Sat Aug 01 20:12:31 2015 +0200
b933b19
ddr: altera: sdram: Clean up set_sdr_mp_weight()
by Marek Vasut
· Sat Aug 01 20:10:23 2015 +0200
f904a86
ddr: altera: sdram: Clean up set_sdr_fifo_cfg()
by Marek Vasut
· Sat Aug 01 20:04:33 2015 +0200
9d64f19
ddr: altera: sdram: Clean up set_sdr_static_cfg()
by Marek Vasut
· Sat Aug 01 20:04:19 2015 +0200
820b0d9
ddr: altera: sdram: Clean up set_sdr_addr_rw()
by Marek Vasut
· Sat Aug 01 19:50:56 2015 +0200
6e9af9b
ddr: altera: sdram: Clean up set_sdr_dram_timing*()
by Marek Vasut
· Sat Aug 01 19:45:24 2015 +0200
82a2764
ddr: altera: sdram: Clean up set_sdr_ctrlcfg()
by Marek Vasut
· Sat Aug 01 19:33:40 2015 +0200
724c50f
ddr: altera: sdram: Clean up compute_errata_rows() part 2
by Marek Vasut
· Sat Aug 01 19:20:19 2015 +0200
186880e
ddr: altera: sdram: Clean up compute_errata_rows() part 1
by Marek Vasut
· Sat Aug 01 18:54:34 2015 +0200
2fda506
ddr: altera: sdram: Switch to generic_hweight32()
by Marek Vasut
· Sat Aug 01 18:46:55 2015 +0200
98d279a
ddr: altera: Clean up of delay_for_n_mem_clocks() part 5
by Marek Vasut
· Sun Jul 26 11:46:04 2015 +0200
7574c87
ddr: altera: Clean up of delay_for_n_mem_clocks() part 4
by Marek Vasut
· Sun Jul 26 11:44:54 2015 +0200
13ee438
ddr: altera: Clean up of delay_for_n_mem_clocks() part 3
by Marek Vasut
· Sun Jul 26 11:42:53 2015 +0200
4b203df
ddr: altera: Clean up of delay_for_n_mem_clocks() part 2
by Marek Vasut
· Sun Jul 26 11:34:09 2015 +0200
50d7199
ddr: altera: Clean up of delay_for_n_mem_clocks() part 1
by Marek Vasut
· Sun Jul 26 11:11:28 2015 +0200
c140275
ddr: altera: Minor clean up of rw_mgr_mem_handoff()
by Marek Vasut
· Sun Jul 26 10:59:19 2015 +0200
a358127
ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo()
by Marek Vasut
· Tue Jul 21 06:18:57 2015 +0200
2da0257
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_end()
by Marek Vasut
· Sat Jul 18 05:58:44 2015 +0200
adbaa2d
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test_issue()
by Marek Vasut
· Tue Jul 21 06:00:36 2015 +0200
c67d962
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3
by Marek Vasut
· Tue Jul 21 05:57:11 2015 +0200
bc773a1
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2
by Marek Vasut
· Tue Jul 21 05:54:39 2015 +0200
0b97c42
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 1
by Marek Vasut
· Tue Jul 21 05:43:37 2015 +0200
2595b24
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 5
by Marek Vasut
· Tue Jul 21 05:33:49 2015 +0200
fc2ec8f
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 4
by Marek Vasut
· Tue Jul 21 05:32:49 2015 +0200
1bb221e
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 3
by Marek Vasut
· Tue Jul 21 05:29:05 2015 +0200
4e79b0a
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 2
by Marek Vasut
· Tue Jul 21 05:26:58 2015 +0200
affbc89
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 1
by Marek Vasut
· Tue Jul 21 05:00:42 2015 +0200
9cdbb96
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 11
by Marek Vasut
· Tue Jul 21 04:27:32 2015 +0200
d29f804
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 10
by Marek Vasut
· Sat Jul 18 20:44:28 2015 +0200
dfed1e6
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 9
by Marek Vasut
· Sat Jul 18 20:42:27 2015 +0200
b69c247
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 8
by Marek Vasut
· Sat Jul 18 20:34:00 2015 +0200
f1b8f71
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 7
by Marek Vasut
· Sat Jul 18 19:57:12 2015 +0200
89feb50
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6
by Marek Vasut
· Sat Jul 18 19:46:26 2015 +0200
aa0e6e1
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 5
by Marek Vasut
· Sat Jul 18 19:18:06 2015 +0200
ca8ea37
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 4
by Marek Vasut
· Sat Jul 18 08:01:45 2015 +0200
85cd4d7
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 3
by Marek Vasut
· Mon Jul 13 02:48:34 2015 +0200
e624caf
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 2
by Marek Vasut
· Mon Jul 13 02:38:15 2015 +0200
b20a506
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 1
by Marek Vasut
· Mon Jul 13 02:11:02 2015 +0200
4a78cc7
ddr: altera: Clean up rw_mgr_mem_calibrate_writes()
by Marek Vasut
· Sat Jul 18 07:23:25 2015 +0200
656002e
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 5
by Marek Vasut
· Mon Jul 20 03:26:05 2015 +0200
50a780f
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 4
by Marek Vasut
· Sun Jul 19 07:57:28 2015 +0200
28957f3
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 3
by Marek Vasut
· Sun Jul 19 07:51:17 2015 +0200
c6c1fe7
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 2
by Marek Vasut
· Sun Jul 19 07:48:58 2015 +0200
a005c77
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 1
by Marek Vasut
· Sun Jul 19 07:44:21 2015 +0200
a50d5d7
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_all_ranks()
by Marek Vasut
· Sun Jul 19 07:35:36 2015 +0200
ec4bbd3
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 7
by Marek Vasut
· Mon Jul 20 09:11:09 2015 +0200
28dbf12
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 6
by Marek Vasut
· Mon Jul 20 09:20:42 2015 +0200
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