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git01.mediatek.com / filogic / uboot / 48425b15bdae560e6f5bb96d3fcf56d33313109f / arch / arm / dts / socfpga_cyclone5_dbm_soc1.dts
  1. 64a12bf arm: socfpga: gen5: add reset & sdr node to SPL devicetrees by Simon Goldschmidt · Fri Mar 01 20:12:29 2019 +0100
  2. 15616b5 dts: arm: socfpga: merge gen5 devicetrees from linux by Simon Goldschmidt · Fri Nov 02 11:54:52 2018 +0100
  3. 3854a1a arm: socfpga: fix device trees to work with DM serial by Simon Goldschmidt · Mon Aug 13 21:34:33 2018 +0200
  4. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  5. b06dad2 ARM: socfpga: Add new CycloneV SoC Devboards DBM-SoC1 board by Marek Vasut · Sat Feb 24 23:34:00 2018 +0100