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git01.mediatek.com
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filogic
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uboot
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47cfef95deb891e0559d1038a4caa0a172ac087e
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drivers
/
clk
/
stm32
/
clk-stm32h7.c
1242761
clk: Add directory for STM32 clock drivers
by Patrick Delaunay
· Thu May 19 17:56:45 2022 +0200
[Renamed from drivers/clk/clk_stm32h7.c]
a1b654b
treewide: invaild -> invalid
by Sean Anderson
· Wed Dec 01 14:26:53 2021 -0500
88c7eb7
clk: clk_stm32h7: migrate trace to dev and log macro
by Patrick Delaunay
· Fri Nov 06 19:01:47 2020 +0100
e6256ce
Merge tag 'v2021.01-rc5' into next
by Tom Rini
· Tue Jan 05 16:20:26 2021 -0500
8a2b47f
dm: treewide: Rename auto_alloc_size members to be shorter
by Simon Glass
· Thu Dec 03 16:55:17 2020 -0700
5d9950d
treewide: Update email address Patrick Delaunay and Patrice Chotard
by Patrice Chotard
· Wed Dec 02 18:47:30 2020 +0100
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
bdfb5c4
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
by Tom Rini
· Wed Apr 18 13:50:47 2018 -0400
78df577
clk: clk_stm32h7: Fix prescaler for Domain 3
by Patrice Chotard
· Wed Feb 07 10:44:48 2018 +0100
5301635
clk: clk_stm32h7: Fix stm32_clk_get_rate() for timer
by Patrice Chotard
· Wed Feb 07 10:44:47 2018 +0100
789ee0e
stm32: fix STMicroelectronics copyright
by Patrice Chotard
· Mon Oct 23 09:53:58 2017 +0200
aa69ee5
dm: clk: fix PWR_CR3 register's bit 2 name
by Patrice Chotard
· Mon Oct 09 11:41:24 2017 +0200
bb698ea
dm: clk: remove CLK() macro for clk_stm32h7
by Patrice Chotard
· Mon Oct 09 11:41:23 2017 +0200
81e1042
treewide: replace with error() with pr_err()
by Masahiro Yamada
· Sat Sep 16 14:10:41 2017 +0900
5fffeab
dm: clk: add clk driver support for stm32h7 SoCs
by Patrice Chotard
· Wed Sep 13 18:00:06 2017 +0200