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git01.mediatek.com / filogic / uboot / 44de6a92b76e585ff85cab47f69d010f95f725f1 / arch / arm / mach-sunxi / clock_sun50i_h6.c
  1. 1987b0c sunxi: add Allwinner R528/T113 SoC support by Andre Przywara · Tue Sep 06 15:59:57 2022 +0100
  2. 0f2a5b1 sunxi: clock: support D1/R528 PLL6 clock by Andre Przywara · Fri Dec 02 21:48:19 2022 +0000
  3. 1b946cd sunxi: clock: D1/R528: Enable PLL LDO during PLL1 setup by Andre Przywara · Fri Dec 02 20:30:40 2022 +0000
  4. 068962b sunxi: introduce NCAT2 generation model by Andre Przywara · Wed Oct 05 17:54:19 2022 +0100
  5. 964a86f sunxi: clock: H6: Adjust PLL LDO before clock setup by Jernej Skrabec · Sun Jan 30 15:27:15 2022 +0100
  6. 5922114 sunxi: clock: H6/H616: Add resistor calibration by Jernej Skrabec · Sun Jan 30 15:27:14 2022 +0100
  7. e04cd49 sunxi: prcm: Add a few registers by Jernej Skrabec · Sun Jan 30 15:27:13 2022 +0100
  8. 0f7c8bc sunxi: clock: H6/H616: Fix PLL clock factor encodings by Andre Przywara · Wed May 05 13:53:05 2021 +0100
  9. 70bdefa sunxi: spl: Fix H616 clock initialization by Jernej Skrabec · Mon Feb 01 18:25:57 2021 +0100
  10. 8b2239c sunxi: introduce support for H616 clocks by Jernej Skrabec · Mon Jan 11 21:11:40 2021 +0100
  11. 55a30a2 sunxi: Add support for I2C on H6 like SoCs by Jernej Skrabec · Mon Jan 11 21:11:38 2021 +0100
  12. d1fa87d sunxi: add clock code for H6 by Icenowy Zheng · Sat Jul 21 16:20:26 2018 +0800