1. 35dffd5 x86: baytrail: Support multiple microcode copies by Bin Meng · Sat Aug 15 14:37:50 2015 -0600
  2. dddf6fd x86: baytrail: Add microcode for BayTrail-I D0 stepping by Bin Meng · Sat Aug 15 14:37:49 2015 -0600
  3. 7133c39 x86: minnowmax: Define and enable interrupt setup by Simon Glass · Thu Aug 13 10:36:16 2015 -0600
  4. 74fdb58 x86: baytrail: Configure FSP UPD from device tree by Andrew Bradford · Fri Aug 07 08:36:35 2015 -0400
  5. 8aea77a x86: dts: Add a device tree file for EFI by Simon Glass · Tue Aug 04 12:33:48 2015 -0600
  6. 947391c x86: bayleybay: Configure PCI IRQ by Bin Meng · Thu Jul 30 03:49:18 2015 -0700
  7. e1c4935 x86: Add Intel Bayley Bay board support by Bin Meng · Thu Jul 30 03:49:17 2015 -0700
  8. 6a3de7c x86: Add microcode for BayTrail-I B0 stepping by Bin Meng · Thu Jul 30 03:49:16 2015 -0700
  9. 6647f57 x86: qemu: Add MP initialization by Bin Meng · Mon Jul 27 19:16:08 2015 +0800
  10. 354dcdd x86: qemu: Enable writing MP table by Bin Meng · Wed Jul 22 01:21:13 2015 -0700
  11. d0e9373 x86: Convert to use driver model pci on queensbay/crownbay by Bin Meng · Sun Jul 19 00:20:07 2015 +0800
  12. 770fd33 x86: Enable DM RTC support for all x86 boards by Bin Meng · Wed Jul 15 16:23:39 2015 +0800
  13. 0e87edc dm: x86: minnowmax: Move PCI to use driver model by Simon Glass · Fri Jul 03 18:28:26 2015 -0600
  14. d2f66a3 x86: queensbay: Change PCIe root ports' interrupt routing by Bin Meng · Tue Jun 23 12:18:55 2015 +0800
  15. c9d0525 x86: queensbay: Correct Topcliff device irqs by Bin Meng · Tue Jun 23 12:18:44 2015 +0800
  16. 8800c41 x86: crownbay: Enable DM RTC support by Bin Meng · Tue Jun 23 12:18:43 2015 +0800
  17. 3916df5 x86: crownbay: Add MP initialization by Bin Meng · Wed Jun 17 11:15:39 2015 +0800
  18. f813548 x86: gpio: add pinctrl support from the device tree by Gabriel Huau · Mon May 25 22:27:37 2015 -0700
  19. ef37e7b x86: qemu: Implement PIRQ routing by Bin Meng · Wed Jun 03 09:20:06 2015 +0800
  20. 70be096 x86: coreboot: Control I/O port 0xb2 writing via device tree by Bin Meng · Wed Jun 03 09:20:05 2015 +0800
  21. 000883b x86: qemu: Create separate i440fx and q35 device trees by Bin Meng · Wed Jun 03 09:20:04 2015 +0800
  22. ef9e9f9 x86: quark: Implement PIRQ routing by Bin Meng · Mon May 25 22:35:06 2015 +0800
  23. 51c3b1e x86: Refactor PIRQ routing support by Bin Meng · Mon May 25 22:35:04 2015 +0800
  24. 2229c4c x86: Support QEMU x86 targets by Bin Meng · Thu May 07 21:34:08 2015 +0800
  25. 1eaaf6c x86: Enable multi-core init for Minnowboard MAX by Simon Glass · Wed Apr 29 22:26:03 2015 -0600
  26. 9278471 x86: link: Add PCH driver to support SPI Flash by Simon Glass · Mon Apr 20 07:07:03 2015 -0600
  27. 07ea9da x86: minnowmax: use the correct NOR in the configuration by Gabriel Huau · Sat Apr 25 08:13:11 2015 -0700
  28. 6d2466c x86: minnowmax: add GPIO banks in the device tree by Gabriel Huau · Sat Apr 25 13:16:57 2015 -0700
  29. 60ccd37 x86: Add alias for SPI node in the board dts by Bin Meng · Wed Apr 15 12:00:11 2015 +0800
  30. 06e694f x86: chromebook_link: dts: Add PCH and LPC devices by Simon Glass · Thu Mar 26 09:29:29 2015 -0600
  31. e0e7b36 dm: x86: pci: Convert chromebook_link to use driver model for pci by Simon Glass · Thu Mar 05 12:25:33 2015 -0700
  32. 3da658a dm: x86: pci: Convert coreboot to use driver model for pci by Simon Glass · Thu Mar 05 12:25:32 2015 -0700
  33. 5f8865f x86: Add support for panther (Asus Chromebox) by Simon Glass · Mon Mar 02 12:40:54 2015 -0700
  34. ba6faff x86: Add SPI support to quark/galileo by Bin Meng · Wed Feb 04 16:26:12 2015 +0800
  35. 6af4d46 x86: galileo: Add GPIO support by Bin Meng · Wed Feb 04 16:26:10 2015 +0800
  36. cdffd3b x86: quark: Call MRC in dram_init() by Bin Meng · Thu Feb 05 23:42:28 2015 +0800
  37. 8d6ed12 x86: Add basic Intel Galileo board support by Bin Meng · Mon Feb 02 22:35:28 2015 +0800
  38. 4a56f10 x86: Add support for Intel Minnowboard Max by Simon Glass · Tue Jan 27 22:13:47 2015 -0700
  39. 7f9f6a9 x86: dts: Add SPI flash MRC details for chromebook_link by Simon Glass · Mon Jan 19 22:16:13 2015 -0700
  40. c8921be x86: Make chromebook_link the default board for coreboot by Bin Meng · Tue Jan 06 22:14:21 2015 +0800
  41. 9281eb5 x86: ivybridge: Update microcode early in boot by Simon Glass · Thu Jan 01 16:18:14 2015 -0700
  42. 37e4030 x86: crownbay: Add pci devices in the dts file by Bin Meng · Wed Dec 31 16:05:14 2014 +0800
  43. b2cfbd6 x86: Use ePAPR defined properties for x86-uart by Bin Meng · Wed Dec 31 16:05:13 2014 +0800
  44. aea05d8 x86: Clean up the board dts files by Bin Meng · Wed Dec 24 13:06:39 2014 +0800
  45. 82db36c x86: Rename coreboot.dsti to serial.dtsi by Bin Meng · Wed Dec 24 13:06:38 2014 +0800
  46. 8776c30 x86: Remove alex.dts in arch/x86/dts by Bin Meng · Wed Dec 24 13:06:37 2014 +0800
  47. 7bb2c3c x86: Rename coreboot-serial to x86-serial by Bin Meng · Wed Dec 17 15:50:47 2014 +0800
  48. 8bfe066 x86: Convert microcode format to device-tree-only by Simon Glass · Wed Dec 17 15:50:37 2014 +0800
  49. da37e75 x86: Integrate Tunnel Creek processor microcode by Bin Meng · Wed Dec 17 15:50:35 2014 +0800
  50. 44679e7 x86: ivybridge: Update the microcode by Simon Glass · Mon Dec 15 22:02:40 2014 -0700
  51. 026d63d x86: Move microcode updates into a separate directory by Simon Glass · Mon Dec 15 22:02:39 2014 -0700
  52. 115b5e3 x86: Add Intel Crown Bay board dts file by Bin Meng · Fri Dec 12 21:05:24 2014 +0800
  53. 85ff0b1 x86: dts: Add video information to the device tree by Simon Glass · Fri Nov 14 20:56:37 2014 -0700
  54. 585be5f x86: dts: Add SATA settings for link by Simon Glass · Fri Nov 14 18:18:39 2014 -0700
  55. c1fd69e x86: dts: Add LPC settings for link by Simon Glass · Fri Nov 14 18:18:37 2014 -0700
  56. eec39ba x86: dts: Move PCI peripherals into a pci node by Simon Glass · Fri Nov 14 18:18:36 2014 -0700
  57. 268eefd x86: ivybridge: Implement SDRAM init by Simon Glass · Wed Nov 12 22:42:28 2014 -0700
  58. 9a44768 x86: chromebook_link: Enable GPIO support by Simon Glass · Wed Nov 12 22:42:25 2014 -0700
  59. 0c84eec x86: dts: Add microcode updates for ivybridge CPU by Simon Glass · Wed Nov 12 22:42:22 2014 -0700
  60. dcfac35 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · Wed Nov 12 22:42:15 2014 -0700
  61. 0b36ecd x86: Add chromebook_link board by Simon Glass · Wed Nov 12 22:42:07 2014 -0700
  62. 60cebe5 dm: x86: Convert coreboot serial to use driver model by Simon Glass · Fri Oct 10 07:49:20 2014 -0600
  63. 1fad146 dm: x86: dts: Add additional info to the serial port node by Simon Glass · Fri Oct 10 07:49:19 2014 -0600
  64. e4e5627 x86: Add device tree information for Chrome OS EC by Simon Glass · Fri Oct 10 07:30:13 2014 -0600
  65. 0123ee2 Makefile: Support include files for .dts files by Simon Glass · Wed Jun 11 23:29:44 2014 -0600
  66. e7a579f dts: generate multiple device tree blobs by Masahiro Yamada · Wed Feb 05 11:28:27 2014 +0900
  67. 884ef15 dts: move device tree sources to arch/$(ARCH)/dts/ by Masahiro Yamada · Wed Feb 05 11:28:26 2014 +0900
  68. 791f61b x86: fdt: Create basic .dtsi file for coreboot by Simon Glass · Mon Dec 03 13:56:51 2012 +0000