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git01.mediatek.com / filogic / uboot / 40a5548b6b06fc9eb2c6ddc0cb9aab7f07dc5f10 / doc / device-tree-bindings / clock / st,stm32mp1.txt
  1. 9a6ce2a clk: stm32mp1: correctly handle Clock Spreading Generator by Patrick Delaunay · Wed Jan 30 13:07:06 2019 +0100
  2. 80cb568 stm32mp1: clk: support digital bypass by Patrick Delaunay · Mon Jul 16 10:41:46 2018 +0200
  3. f11398e clk: stm32mp1: add clock tree initialization by Patrick Delaunay · Mon Mar 12 10:46:16 2018 +0100