Log - 3e9aa0b5a37b194b25e3c4ac60b0382f360db760 - filogic/uboot

3e9aa0b clk: sunxi: add PIO bus gate clocks by Andre Przywara · Wed May 04 22:10:28 2022 +0100
fdad831 clk: sunxi: h6_r: Correct the driver name by Samuel Holland · Sat Apr 23 16:07:16 2022 -0500
e59d7fe clk: sunxi: implement clock driver for suniv f1c100s by George Hilliard · Sun Jul 25 19:16:23 2021 -0400
9a77a96 clk: sunxi: Extend DM_RESET selection to SPL by Samuel Holland · Sat Sep 11 14:45:31 2021 -0500
f7d4954 clk: sunxi: Add drivers for A31 and H6 PRCM CCUs by Samuel Holland · Sun Sep 12 09:47:25 2021 -0500
fa7a7fa clk: sunxi: Add support for I2C gates/resets by Samuel Holland · Sun Sep 12 09:47:24 2021 -0500
12e3faa clk: sunxi: Move header out of arch directory by Samuel Holland · Sun Sep 12 11:48:43 2021 -0500
d73b8a5 clk: sunxi: h6: Add XHCI clocks by Samuel Holland · Sun Feb 07 23:57:20 2021 -0600
5861030 clk: sunxi: Add a dummy clock driver for the RTC by Samuel Holland · Sun Feb 07 23:57:19 2021 -0600
e52dc3e clk: sunxi: Add support for H616 clocks by Jernej Skrabec · Mon Jan 11 21:11:52 2021 +0100
8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
18e4ab6 clk: sunxi: add compatible string for V3 by Icenowy Zheng · Mon Oct 26 22:18:02 2020 +0800
4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
60e6efd sunxi: clocks: Add H6 USB clock gates and resets by Andre Przywara · Sun Jun 23 15:09:48 2019 +0100
fc22820 clk: sunxi: r40: Fix GMAC reset reg offset by Jagan Teki · Mon Apr 15 16:42:16 2019 +0530
53698b2 clk: sunxi: a10: Add CLK_AHB_GMAC by Jagan Teki · Thu Mar 28 13:46:11 2019 +0530
755e181 clk: sunxi: h3: Implement EPHY CLK and RESET by Jagan Teki · Thu Feb 28 00:26:59 2019 +0530
836631b clk: sunxi: Implement EMAC, GMAC clocks, resets by Jagan Teki · Thu Feb 28 00:26:57 2019 +0530
f4b29f4 clk: sunxi: Implement A10 EMAC clocks by Jagan Teki · Thu Feb 28 00:26:49 2019 +0530
bc12313 clk: sunxi: Implement SPI clocks, resets by Jagan Teki · Wed Feb 27 20:02:06 2019 +0530
030bab8 sunxi: clk: enable clk and reset for CCU devices by Andre Przywara · Tue Jan 29 15:54:08 2019 +0000
8c8c8a4 sunxi: clk: A80: add MMC clock support by Andre Przywara · Tue Jan 29 15:54:10 2019 +0000
ddf33c1 sunxi: clk: add MMC gates/resets by Andre Przywara · Tue Jan 29 15:54:09 2019 +0000
e366a0c clk: sunxi: Add Allwinner A80 CLK driver by Jagan Teki · Fri Jan 11 15:41:46 2019 +0530
5bc16d2 clk: sunxi: Add Allwinner H6 CLK driver by Jagan Teki · Mon Dec 31 15:35:01 2018 +0530
b490aa5 clk: sunxi: Implement UART resets by Jagan Teki · Sun Dec 30 21:37:31 2018 +0530
8cf08ea clk: sunxi: Implement UART clocks by Jagan Teki · Sun Dec 30 21:29:24 2018 +0530
d69bf0b clk: sunxi: Add Allwinner V3S CLK driver by Jagan Teki · Sun Aug 05 14:31:54 2018 +0530
66c07fd clk: sunxi: Add Allwinner R40 CLK driver by Jagan Teki · Sun Aug 05 11:16:33 2018 +0530
2474033 clk: sunxi: Add Allwinner A83T CLK driver by Jagan Teki · Thu Aug 02 23:33:55 2018 +0530
885abd8 clk: sunxi: Add Allwinner A23/A33 CLK driver by Jagan Teki · Thu Aug 02 23:25:03 2018 +0530
438e8f6 clk: sunxi: Add Allwinner A31 CLK driver by Jagan Teki · Thu Aug 02 23:15:34 2018 +0530
0c16029 clk: sunxi: Add Allwinner A10s/A13 CLK driver by Jagan Teki · Thu Aug 02 19:54:26 2018 +0530
b38f7af clk: sunxi: Add Allwinner A10/A20 CLK driver by Jagan Teki · Thu Aug 02 16:52:37 2018 +0530
2ee11ff clk: sunxi: Add Allwinner H3/H5 CLK driver by Jagan Teki · Thu Aug 02 15:43:02 2018 +0530
7f6c2a8 reset: Add Allwinner RESET driver by Jagan Teki · Fri Jan 18 22:18:13 2019 +0530
1d150b4 clk: Add Allwinner A64 CLK driver by Jagan Teki · Sat Dec 22 21:32:49 2018 +0530