Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 3deae0dcdd3c616ac76ccc837ebaaad3d6723157 / arch / arm / mach-zynq / slcr.c
  1. e67c6c4 zynq: Move zynq to clock framework by Stefan Herbrechtsmeier · 8 years ago
  2. 3e47077 net: zynq: Don't overwrite gem_rclk_ctrl with default value by Stefan Herbrechtsmeier · 8 years ago
  3. 42e942f zynq: nand: Runtime detection of nand buswidth through slcr by Michal Simek · 8 years ago
  4. 43246cc ARM: zynq: move SoC sources to mach-zynq by Masahiro Yamada · 10 years ago[Renamed from arch/arm/cpu/armv7/zynq/slcr.c]
  5. be0bf69 zynq: slcr: Disable all level shifters by Siva Durga Prasad Paladugu · 10 years ago
  6. 250e605 ARM: zynq: slcr: Dont modify the reserved bits by Siva Durga Prasad Paladugu · 10 years ago
  7. ec02820 ARM: zynq: ehci: Added USB host driver support by Michal Simek · 11 years ago
  8. 8d19162 ARM: zynq: Add MIO detection code by Michal Simek · 11 years ago
  9. bc73304 ARM: zynq: Setup correct slcr_lock value by Michal Simek · 11 years ago
  10. 7cffeb0 ARM: zynq: slcr: Fix incorrect commentary by Michal Simek · 11 years ago
  11. 90b8064 ARM: zynq: Fix sparse warnings in slcr.c by Michal Simek · 11 years ago
  12. 4dded98 net: zynq_gem: Calculate clock dividers dynamically by Soren Brinkmann · 11 years ago
  13. 3b5b992 net: zynq_gem: Move RCLK details out of driver by Soren Brinkmann · 11 years ago
  14. 11704c2 zynq: Add support to find bootmode by Jagannadha Sutradharudu Teki · 11 years ago
  15. 661ccfc zynq: slcr: Wait 100ms till clk is properly setup by Michal Simek · 12 years ago
  16. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · 11 years ago
  17. 15d654c fpga: zynq: Add support for loading bitstream by Michal Simek · 12 years ago
  18. d9f2c11 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · 12 years ago
  19. eb1dfa7 arm: zynq: Add SLCR support with system reset by Michal Simek · 12 years ago