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git01.mediatek.com / filogic / uboot / 3b15e951aa1641c5299a66532873414776146099 / drivers / net / zynq_gem.c
  1. fca1e84 common: miiphyutil: Work and report phy address in hex in mdio cmd by Michal Simek · Wed Nov 16 08:41:01 2016 +0100
  2. f6c2d20 net: zynq_gem: Correct SGMII enable bit setting by Siva Durga Prasad Paladugu · Mon May 16 15:31:38 2016 +0530
  3. 7e7fcc3 net: zynq_gem: Modify the nwcfg bit definitions by Siva Durga Prasad Paladugu · Mon May 16 15:31:37 2016 +0530
  4. 64e4f7f treewide: replace #include <asm-generic/errno.h> with <linux/errno.h> by Masahiro Yamada · Wed Sep 21 11:28:57 2016 +0900
  5. 39452be Merge branch 'master' of git://git.denx.de/u-boot-net by Tom Rini · Tue May 24 11:59:02 2016 -0400
  6. a582871 net: zynq_gem: Add the passing of the phy-handle node by Dan Murphy · Mon May 02 15:45:57 2016 -0500
  7. 24ce232 phy: Wire return value from phy_config() by Michal Simek · Wed May 18 14:37:23 2016 +0200
  8. dbc0cfc net: xilinx: Handle error value from phy_startup() by Michal Simek · Wed May 18 12:37:22 2016 +0200
  9. 4546700 net: zynq_gem: Add SGMII support for zynqMP by Siva Durga Prasad Paladugu · Fri Mar 25 12:53:44 2016 +0530
  10. b81fe87 net: zynq_gem: Return error incase of invalid phy address by Siva Durga Prasad Paladugu · Wed Mar 30 12:29:49 2016 +0530
  11. 7f4e555 net: gem: Allow to set the MAC from an EEPROM by Joe Hershberger · Tue Jan 26 11:57:03 2016 -0600
  12. 65d3f3a net: zynq_gem: Add support for SGMII interface by Siva Durga Prasad Paladugu · Fri Feb 05 13:22:11 2016 +0530
  13. 780c535 net: zynq: Change MDC setup for arm64 by Michal Simek · Tue Sep 08 17:20:01 2015 +0200
  14. 93597d7 net: zynq_gem: Use shared wait_for_bit by Mateusz Kulikowski · Sat Jan 23 11:54:33 2016 +0100
  15. 27ba090 net: gem: Add driver dependencies to PHYLIB by Michal Simek · Fri Dec 11 09:14:31 2015 +0100
  16. 57b0269 net: gem: Separate recv and free_pkt functions by Michal Simek · Wed Dec 09 14:26:48 2015 +0100
  17. 139f410 net: gem: Fix return value from recv by Michal Simek · Wed Dec 09 14:16:32 2015 +0100
  18. c6aa413 net: gem: Setup default phy address to -1 by Michal Simek · Wed Dec 09 09:29:12 2015 +0100
  19. d9cfa97 net: gem: Enable CTRL+C in wait_for_bit by Michal Simek · Thu Sep 24 20:13:45 2015 +0200
  20. 3c4ce3c net: gem: Read information about interface from DT by Michal Simek · Mon Nov 30 14:17:50 2015 +0100
  21. 250e05e net: gem: Move driver to DM by Michal Simek · Mon Nov 30 14:14:56 2015 +0100
  22. 3f8c635 net: gem: Fix miiphy_read name by Michal Simek · Mon Nov 30 14:14:37 2015 +0100
  23. df3b414 net: gem: Remove zynq_gem_of_init() by Michal Simek · Mon Nov 30 14:00:20 2015 +0100
  24. e9ecc1c net: gem: Enable MDIO bus earlier by Michal Simek · Mon Nov 30 13:58:36 2015 +0100
  25. 2c68e08 net: gem: Check if priv->phydev is valid by Michal Simek · Mon Nov 30 14:03:37 2015 +0100
  26. 7cd7ea6 net: gem: Extract phy init code by Michal Simek · Mon Nov 30 13:54:43 2015 +0100
  27. 43b3832 net: gem: Remove phydev variable by Michal Simek · Mon Nov 30 13:44:49 2015 +0100
  28. 1a63ee2 net: gem: Change mii function not to use eth_device structure by Michal Simek · Mon Nov 30 10:24:15 2015 +0100
  29. 3ce1615 net: gem: Change mdio_wait prototype to pass regs by Michal Simek · Mon Nov 30 10:09:43 2015 +0100
  30. 75fbb69 net: gem: Do not continue if phy is not found by Michal Simek · Mon Nov 30 13:38:32 2015 +0100
  31. 728d32e net: zynq: Fix MDC setting for zynq by Michal Simek · Tue Sep 08 17:07:01 2015 +0200
  32. d5abec6 net: zynq: Remove unused MDCCLKDIV2 macro by Michal Simek · Tue Sep 08 16:54:39 2015 +0200
  33. 6429595 net: zynq: Fix mdc clock division setting for 100Mbit/s by Michal Simek · Tue Sep 08 16:55:42 2015 +0200
  34. 975ae35 net: zynq: Wait till packet is sent by Michal Simek · Mon Aug 17 09:57:46 2015 +0200
  35. 2304511 net: zynq: Disable secondary queues by Edgar E. Iglesias · Fri Sep 25 23:50:07 2015 -0700
  36. 1dc446e net: zynq: Add dummy packet to fix packet duplication issue by Michal Simek · Mon Aug 17 09:58:54 2015 +0200
  37. f91f7e5 net: zynq: Do not report TX underrun by Michal Simek · Mon Aug 17 09:51:34 2015 +0200
  38. b6fe7ad net: zynq: Setup BD when structures are filled by Michal Simek · Mon Aug 17 09:50:09 2015 +0200
  39. c6eb0bc net: zynq: Allocate BD_SPACE in connection to RX_BUF by Michal Simek · Mon Aug 17 09:45:53 2015 +0200
  40. ff5dbef net: zynq: Fix clearing statistic by Michal Simek · Mon Oct 05 12:49:48 2015 +0200
  41. 74a86e8 net: zynq: Extend register description with offsets by Michal Simek · Mon Oct 05 11:49:43 2015 +0200
  42. 492de0f net: zynq: Add support for different PHY interface types by Michal Simek · Wed Oct 07 16:42:56 2015 +0200
  43. c919c2c net: zynq: Add debug message to phyread/phywrite by Michal Simek · Wed Oct 07 16:34:51 2015 +0200
  44. 1e9e619 driver: net: Fix pointer conversion warnings for xilinx_zynqmp_ep by Prabhakar Kushwaha · Sun Oct 25 13:18:54 2015 +0530
  45. 366b24f of: clean up OF_CONTROL ifdef conditionals by Masahiro Yamada · Wed Aug 12 07:31:55 2015 +0900
  46. 3b4b5db net: gem: Extend timeout value by Michal Simek · Tue Oct 16 17:37:11 2012 +0200
  47. aaf9cc1 zynq: gem: Setting up WRAP bit for one TX bd by Michal Simek · Tue May 26 12:01:12 2015 +0200
  48. 55931cf zynq: gem: Increase the Rx buffer descriptors to 32 by Siva Durga Prasad Paladugu · Wed Apr 15 12:15:01 2015 +0530
  49. 2b0690e zynqmp: gem: Flush the rx buffers while transmitting by Siva Durga Prasad Paladugu · Sat Dec 06 12:57:53 2014 +0530
  50. 71245a4 zynqmp: gem: Set data bus width to 64bit for arm64 by Siva Durga Prasad Paladugu · Tue Jul 08 15:31:03 2014 +0530
  51. 0afb6b2 net: gem: Use correct type for casting by Michal Simek · Wed Apr 15 13:31:28 2015 +0200
  52. 9f09a36 net: cosmetic: Fix var naming net <-> eth drivers by Joe Hershberger · Wed Apr 08 01:41:06 2015 -0500
  53. 13b4d3c net: gem: Use phys_addr_t instead of int for addresses by Michal Simek · Wed Jan 14 15:44:21 2015 +0100
  54. b055f67 net: zynq: Fix sparse warnings in gem by Michal Simek · Fri Apr 25 14:17:38 2014 +0200
  55. 5031623 net: zynq: Use predefined macros instead of hardcoded value by Michal Simek · Tue Feb 25 10:25:38 2014 +0100
  56. 12dbc40 net: gem: Add OF initialization support by Michal Simek · Mon Feb 24 11:16:30 2014 +0100
  57. 4dded98 net: zynq_gem: Calculate clock dividers dynamically by Soren Brinkmann · Thu Nov 21 13:39:01 2013 -0800
  58. 3b5b992 net: zynq_gem: Move RCLK details out of driver by Soren Brinkmann · Thu Nov 21 13:39:00 2013 -0800
  59. 216b96d net: gem: Check if phy was correctly detected by Michal Simek · Tue Nov 12 14:25:29 2013 +0100
  60. cbf20b2 net: zynq_gem: Add d-cache support by Srikanth Thokala · Fri Nov 08 22:55:48 2013 +0530
  61. bd8ec7e Coding Style cleanup: remove trailing white space by Wolfgang Denk · Mon Oct 07 13:07:26 2013 +0200
  62. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  63. ab72cb4 net: gem: Add support for phy autodetection by Michal Simek · Mon Apr 22 14:41:09 2013 +0200
  64. 73875dc net: gem: Preserve clk on emio interface by David Andrey · Fri Apr 05 17:24:24 2013 +0200
  65. 1b0dd5e net: gem: Pass phy address to init by David Andrey · Thu Apr 04 19:13:07 2013 +0200
  66. d9f2c11 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · Mon Oct 15 14:01:23 2012 +0200
  67. a94f84d net: gem: Do not initialize BDs again by Michal Simek · Thu Jan 24 13:04:12 2013 +0100
  68. 3b9f30e net: gem: Simplify return path in zynq_gem_recv by Michal Simek · Fri Jan 25 08:24:18 2013 +0100
  69. bb2ad88 net: gem: Remove WRAP bit from TX buffer description by Michal Simek · Wed Oct 17 11:03:40 2012 +0200
  70. 19dfc47 net: Add driver for Zynq Gem IP by Michal Simek · Thu Sep 13 20:23:34 2012 +0000